Tunable ion energy barrier modulation through aliovalent halide doping for reliable and dynamic memristive neuromorphic systems.

Memristive neuromorphic computing has emerged as a promising computing paradigm for the upcoming artificial intelligence era, offering low power consumption and high speed. However, its commercialization remains challenging due to reliability issues from stochastic ion movements. Here, we propose an innovative method to enhance the memristive uniformity and performance through aliovalent halide doping. By introducing fluorine concentration into dynamic TiO2-x memristors, we experimentally demonstrate reduced device variations, improved switching speeds, and enhanced switching windows. Atomistic simulations of amorphous TiO2-x reveal that fluoride ions attract oxygen vacancies, improving the reversible redistribution and uniformity. A number of migration barrier calculations statistically show that fluoride ions also reduce the migration energies of nearby oxygen vacancies, facilitating ionic diffusion and high-speed switching. The detailed Voronoi volume analysis further suggests design principles in terms of the migrating species' electrostatic repulsion and migration barriers. This work presents an innovative methodology for the fabrication of reliable memristor devices, contributing to the realization of hardware-based neuromorphic systems.

Phase-change memory via a phase-changeable self-confined nano-filament.

Phase-change memory (PCM) has been considered a promising candidate for solving von Neumann bottlenecks owing to its low latency, non-volatile memory property and high integration density1,2. However, PCMs usually require a large current for the reset process by melting the phase-change material into an amorphous phase, which deteriorates the energy efficiency2-5. Various studies have been conducted to reduce the operation current by minimizing the device dimensions, but this increases the fabrication cost while the reduction of the reset current is limited6,7. Here we show a device for reducing the reset current of a PCM by forming a phase-changeable SiTex nano-filament. Without sacrificing the fabrication cost, the developed nano-filament PCM achieves an ultra-low reset current (approximately 10 µA), which is about one to two orders of magnitude smaller than that of highly scaled conventional PCMs. The device maintains favourable memory characteristics such as a large on/off ratio, fast speed, small variations and multilevel memory properties. Our finding is an important step towards developing novel computing paradigms for neuromorphic computing systems, edge processors, in-memory computing systems and even for conventional memory applications.

Linear conductance update improvement of CMOS-compatible second-order memristors for fast and energy-efficient training of a neural network using a memristor crossbar array.

Memristors are two-terminal memory devices that can change the conductance state and store analog values. Thanks to their simple structure, suitability for high-density integration, and non-volatile characteristics, memristors have been intensively studied as synapses in artificial neural network systems. Memristive synapses in neural networks have theoretically better energy efficiency compared with conventional von Neumann computing processors. However, memristor crossbar array-based neural networks usually suffer from low accuracy because of the non-ideal factors of memristors such as non-linearity and asymmetry, which prevent weights from being programmed to their targeted values. In this article, the improvement in linearity and symmetry of pulse update of a fully CMOS-compatible HfO2-based memristor is discussed, by using a second-order memristor effect with a heating pulse and a voltage divider composed of a series resistor and two diodes. We also demonstrate that the improved device characteristics enable energy-efficient and fast training of a memristor crossbar array-based neural network with high accuracy through a realistic model-based simulation. By improving the memristor device's linearity and symmetry, our results open up the possibility of a trainable memristor crossbar array-based neural network system that possesses great energy efficiency, high area efficiency, and high accuracy at the same time.

The gate injection-based field-effect synapse transistor with linear conductance update for online training.

Neuromorphic computing, an alternative for von Neumann architecture, requires synapse devices where the data can be stored and computed in the same place. The three-terminal synapse device is attractive for neuromorphic computing due to its high stability and controllability. However, high nonlinearity on weight update, low dynamic range, and incompatibility with conventional CMOS systems have been reported as obstacles for large-scale crossbar arrays. Here, we propose the CMOS compatible gate injection-based field-effect transistor employing thermionic emission to enhance the linear conductance update. The dependence of the linearity on the conduction mechanism is examined by inserting an interfacial layer in the gate stack. To demonstrate the conduction mechanism, the gate current measurement is conducted under varying temperatures. The device based on thermionic emission achieves superior synaptic characteristics, leading to high performance on the artificial neural network simulation as 93.17% on the MNIST dataset.

Experimental demonstration of highly reliable dynamic memristor for artificial neuron and neuromorphic computing.

Neuromorphic computing, a computing paradigm inspired by the human brain, enables energy-efficient and fast artificial neural networks. To process information, neuromorphic computing directly mimics the operation of biological neurons in a human brain. To effectively imitate biological neurons with electrical devices, memristor-based artificial neurons attract attention because of their simple structure, energy efficiency, and excellent scalability. However, memristor's non-reliability issues have been one of the main obstacles for the development of memristor-based artificial neurons and neuromorphic computings. Here, we show a memristor 1R cross-bar array without transistor devices for individual memristor access with low variation, 100% yield, large dynamic range, and fast speed for artificial neuron and neuromorphic computing. Based on the developed memristor, we experimentally demonstrate a memristor-based neuron with leaky-integrate and fire property with excellent reliability. Furthermore, we develop a neuro-memristive computing system based on the short-term memory effect of the developed memristor for efficient processing of sequential data. Our neuro-memristive computing system successfully trains and generates bio-medical sequential data (antimicrobial peptides) while using a small number of training parameters. Our results open up the possibility of memristor-based artificial neurons and neuromorphic computing systems, which are essential for energy-efficient edge computing devices.

Heterogeneous and Monolithic 3D Integration of III-V-Based Radio Frequency Devices on Si CMOS Circuits.

Next-generation wireless communication such as sixth-generation (6G) and beyond is expected to require high-frequency, multifunctionality, and power-efficiency systems. A III-V compound semiconductor is a promising technology for high-frequency applications, and a Si complementary metal-oxide-semiconductor (CMOS) is the never-beaten technology for highly integrated digital circuits. To harness the advantages of these two technologies, monolithic integration of III-V and Si electronics is beneficial, so that there have been everlasting efforts to accomplish the monolithic integration. Considering that the on horizon 6G wireless communication requires faster and more energy-efficient system-on-chip technologies, it is imperative to realize a radio frequency (RF) system in which III-V technology and Si CMOS technology are integrated at a device level. Here we report heterogeneous and monolithic three-dimensional (3D) analog/RF-digital mixed-signal integrated circuits that contain two types of InGaAs high-electron-mobility transistors (HEMTs) designed for high fT and fMAX in the top and Si CMOS mixed-signal circuits consisting of an analog-to-digital converter and digital-to-analog converter in the bottom. A high unity current gain cutoff frequency of 448 GHz and unity power gain cutoff frequency of 742 GHz have been achieved by the fT oriented and fMAX oriented InGaAs HEMTs, respectively, without being affected by mixed-signal interference. At the same time, the bottom Si CMOS circuits provide valid signals without any performance degradation by the integration process.