Poole-Frenkel (PF)-MOS: A Proposal for the Ultimate Scale of an MOS Transistor.

This work reports, for the first time, the phenomenon of lateral Poole-Frenkel current conduction along the dielectric/Si interface of a silicon nanowire metal-oxide semiconductor (MOS) transistor. This discovery has a great impact on the study of device characteristic modeling and device reliability, leading to a new kind of electronic device with a distinct operation mechanism for replacing the existing MOS transistor structure. By measuring the current-voltage characteristics of silicon nanowire MOS transistors with different nanowire widths and at elevated temperatures up to 450 K, we found that the current level in the conventional ohmic region of MOS transistors, especially for the transistors with a nanowire width of 10 nm, was significantly enhanced and the characteristics are no longer linear or in an ohmic relationship. The enhancement strongly depended on the applied drain voltage and strictly followed the Poole-Frenkel emission characteristics. Based on this discovery, we proposed a new type of MOS device: a Poole-Frenkel emission MOS transistor, or PF-MOS. The PF-MOS uses the high defect state Si/dielectric interface layer as the conduction channel and is expected to possess several unique features that have never been reported. PF-MOS could be considered as the ultimate MOS structure from a technological point of view. In particular, it eliminates the requirement of a subnanometer gate dielectric equivalent oxide thickness (EOT) and eradicates the server mobility degradation issue in the sub-decananometer nanowires.

Ferromagnetism modulation by ultralow current in a two-dimensional polycrystalline molybdenum disulphide atomic layered structure.

Layered materials, such as graphene and transition metal dichalcogenides, are able to obtain new properties and functions through the modification of their crystal arrangements. In particular, ferromagnetism in polycrystalline MoS2 is of great interest because the corresponding nonmagnetic single crystals exhibit spontaneous spin splitting only through the formation of grain boundaries. However, no one has reported direct evidence of this unique phenomenon thus far. Herein, we demonstrate ferromagnetism modulation by an ultralow current density < 103 A/cm2 in 7.5-nm-thick polycrystalline MoS2, in which magnetoresistance shows three patterns according to the current intensity: wide dip, nondip and narrow dip structures. Since magnetoresistance occurs because of the interaction between the current of 4d electrons in the bulk and localized 4d spins in grain boundaries, this result provides evidence of the current modulation of ferromagnetism induced by grain boundaries. Our findings pave the way for the investigation of a novel method of magnetization switching with low power consumption for magnetic random access memories.

On the Vertically Stacked Gate-All-Around Nanosheet and Nanowire Transistor Scaling beyond the 5 nm Technology Node.

This work performs a detailed comparison of the channel width folding effectiveness of the FinFET, vertically stacked nanosheet transistor (VNSFET), and vertically stacked nanowire transistor (VNWFET) under the constraints of the same vertical (fin) height and layout footprint size (fin width) defined by the same lithography and dry etching capabilities of a foundry. The results show that the nanosheet structure has advantages only when the intersheet spacing or vertical sheet pitch is less than the sheet width. Additionally, for the nanowire transistors, the wire spacing should be less than 57% of the wire diameter in order to have a folding ratio better than a FinFET with the same total height and footprint. Considering the technological constraints for the gate oxide and metal gate thicknesses, the minimum intersheet/interwire spacing should be in the range of 7 to 8 nm. Then, the VNSFET structure has the advantage of boosting the chip density over the FinFET ones only when the sheet width is wider than 8 nm. On the other hand, the VNWFET structure may have a better footprint sizing than the FinFET ones only when the nanowire diameter is larger than 14 nm. In addition, considering the different channel mobilities along the different surface directions of the silicon channel and also some other unfavorable natures such as more complicated processes, more significant surface roughness scattering, and parasitic capacitance effects, the nanosheet transistor does not show superior scaling capability than the FinFET counterpart when approaching the ultimate technology node.

Characteristic Variabilities of Subnanometer EOT La2O3 Gate Dielectric Film of Nano CMOS Devices.

As CMOS devices are scaled down to a nanoscale range, characteristic variability has become a critical issue for yield and performance control of gigascale integrated circuit manufacturing. Nanoscale in size, few monolayers thick, and less thermally stable high-k interfaces all together cause more significant surface roughness-induced local electric field fluctuation and thus leads to a large device characteristic variability. This paper presents a comprehensive study and detailed discussion on the gate leakage variabilities of nanoscale devices corresponding to the surface roughness effects. By taking the W/La2O3/Si structure as an example, capacitance and leakage current variabilities were found to increase pronouncedly for samples even with a very low-temperature thermal annealing at 300 °C. These results can be explained consistently with the increase in surface roughness as a result of local oxidation at the La2O3/Si interface and the interface reactions at the W/La2O3 interface. The surface roughness effects are expected to be severe in future generations' devices with even thinner gate dielectric film and smaller size of the devices.

Individual Atomic Imaging of Multiple Dopant Sites in As-Doped Si Using Spectro-Photoelectron Holography.

The atomic scale characterization of dopant atoms in semiconductor devices to establish correlations with the electrical activation of these atoms is essential to the advancement of contemporary semiconductor process technology. Spectro-photoelectron holography combined with first-principles simulations can determine the local three-dimensional atomic structures of dopant elements, which in turn affect their electronic states. In the work reported herein, this technique was used to examine arsenic (As) atoms doped into a silicon (Si) crystal. As 3d core level photoelectron spectroscopy demonstrated the presence of three types of As atoms at a total concentration of approximately 1020 cm-3, denoted as BEH, BEM, and BEL. On the basis of Hall effect measurements, the BEH atoms corresponded to electrically active As occupying substitutional sites and exhibiting larger thermal fluctuations than the Si atoms, while the BEM atoms corresponded to electrically inactive As embedded in the AsnV (n = 2-4) type clusters. Finally, the BEL atoms were assigned to electrically inactive As in locally disordered structures.

The interfaces of lanthanum oxide-based subnanometer EOT gate dielectrics.

When pushing the gate dielectric thickness of metal-oxide-semiconductor (MOS) devices down to the subnanometer scale, the most challenging issue is the interface. The interfacial transition layers between the high-k dielectric/Si and between the high-k dielectric/gate metal become the critical constraints for the smallest achievable film thickness. This work presents a detailed study on the interface bonding structures of the tungsten/lanthanum oxide/silicon (W/La2O3/Si) MOS structure. We found that both W/La2O3 and La2O3/Si are thermally unstable. Thermal annealing can lead to W oxidation and the forming of a complex oxide layer at the W/La2O3 interface. For the La2O3/Si interface, thermal annealing leads to a thick low-k silicate layer. These interface layers do not only cause significant device performance degradation, but also impose a limit on the thinnest equivalent oxide thickness (EOT) to be achievable which may be well above the requirements of our future technology nodes.

Photoluminescence characterization in silicon nanowire fabricated by thermal oxidation of nano-scale Si fin structure.

Low-temperature photoluminescence (PL) spectra of electron-hole systems in Si nanowires (NWs) prepared by thermal oxidization of Si fin structures were studied. Mapping of PL reveals that NWs with uniform width are formed over a large area. Annealing temperature dependence of PL peak intensities was maximized at 400 °C for each NW type, which are consistent with previous reports. Our results confirmed that the micro-PL demonstrated here is one of the important methods for characterizations of the interface defects in Si NWs.

Role of dislocation movement in the electrical conductance of nanocontacts.

Dislocation is a lattice imperfection of crystalline materials. Dislocation movement is induced during plastic deformation and influences the mechanical properties. Although the role of dislocation in mechanical properties has been well understood, the role of dislocation in electrical properties is completely lacking. Only Matthiessen's rule addresses the electrical influence of dislocations at the macroscale. Here, we show that the electrical conductance change due to dislocations and show their movements through in situ observation of a gold nanocontact. The density of the dislocations in the gold nanocontact did not affect the electrical conductance. The repeated and discrete dislocation movements resulted in an electrical conductance oscillation. Our results demonstrate how dislocations and their movements affect electric conductance at the nanoscale. This instability issue will cause a big problem for future electric devices such as ultra low power electric devices and nanowire photovoltaic devices.

Exceptional plasticity of silicon nanobridges.

The plasticity of covalently bonded materials is a subject at the forefront of materials science, bearing on a wide range of technological and fundamental aspects. However, covalent materials fracture in a brittle manner when the deformation exceeds just a few per cent. It is predicted that a macroscopically brittle material like silicon can show nanoscale plasticity. Here we report the exceptional plasticity observed in silicon nanocontacts ('nanobridges') at room temperature using a special experimental setup combining a transmission electron microscope and a microelectromechanical system. When accounting for surface diffusion, we succeeded in elongating the nanocontact into a wire-like structure, with a fivefold increase in volume, up to more than twenty times the original length. Such a large plasticity was caused by the stress-assisted diffusion and the sliding of the intergranular, amorphous-like material among the nanocrystals.

In situ TEM observation of nanobonding formation between silicon MEMS tips.

The process of formation of silicon nanobonds between opposing silicon tips was observed in situ with a transmission electron microscope at room temperature. Silicon nanobonding was formed by soft contact of the tips driven by MEMS actuators. According to the observations of the nanobond formation at atomic resolution, the structure of the bond evolved in three stages: (1) the formation of an initial amorphous bond, (2) its transformation into a mixture of amorphous silicon and nano-sized crystalline grains and (3) the transformation of a multi-crystalline bond.

DNA manipulation and retrieval from an aqueous solution with micromachined nanotweezers.

We have demonstrated DNA handling with micromachined nanotweezers that consist of a pair of opposing nanoprobes and integrated thermal expansion microactuators for changing the probe gap. The probe tips coated with a thin Al layer were dipped into a droplet of a solution containing lambda-DNA molecules labeled with fluorescence dye, and then an ac electric field was applied between probes for several seconds. DNA molecules were then captured between the probe tips and retrieved from the solution to the air. The DNA capture between the probe tips could be performed more successfully on the droplet surface than in the underwater region. We also conducted an observation of the retrieved DNA molecules by transmission electron microscope and found that the thickness of the retrieved DNA molecules under the condition of this experiment was approximately 21 nm when the time of the applied ac power (1 MHz, 20 Vpp) was 20 s.