Simulation of a randomly percolated CNT network for an improved analog physical unclonable function.

Carbon nanotube networks (CNTs)-based devices are well suited for the physically unclonable function (PUF) due to the inherent randomness of the CNT network, but CNT networks can vary significantly during manufacturing due to various controllable process conditions, which have a significant impact on PUF performance. Therefore, optimization of process conditions is essential to have a PUF with excellent performance. However, because it is time-consuming and costly to fabricate directly under various conditions, we implement randomly formed CNT network using simulation and confirm the variable correlation of the CNT network optimized for PUF performance. At the same time, by implementing an analog PUF through simulation, we present a 2D patterned PUF that has excellent security and can compensate for error occurrence problems. To evaluate the performance of analog PUF, a new evaluation method different from the existing digital PUF is proposed, and the PUF performance is compared according to two process variables, CNT density and metallic CNT ratio, and the correlation with PUF performance is confirmed. This study can serve as a basis for research to produce optimized CNT PUF by applying simulation according to the needs of the process of forming a CNT network.

Gate Capacitance Coupling of Double-Gate Carbon Nanotube Network Transistors.

Carbon nanotube (CNT) network channels constructed using a high-purity CNT solution for use in CNT thin-film transistors have the advantages of the possibility of requiring a low-temperature process and needing no special equipment. However, there are empty spaces between individual CNTs, resulting in unexpected effects. In this study, double-gate (DG) CNT network transistors were fabricated and measured in four different configurations to observe the capacitive coupling effects between the top gate (TG) and bottom gate (BG) in the DG structure. As a result, the electrical characteristics measured with the BG with a thicker gate oxide while floating the TG were similar to those measured with the TG with a thinner gate oxide. A comparison of the measured transfer curves showed that TG and BG were strongly coupled through the empty spaces in the channels. In addition, we evaluated the capacitance coupling effect due to changes in the CNT density, which is closely related to the empty space of the network channel. Finally, we proposed a method to determine the effective gate capacitance by considering the empty spaces between CNTs, which enabled the accurate evaluation of mobility. The effects of these materials were demonstrated by fabricating transistors using Al2O3, HfO2, and ZrO2 as TG oxide materials. By focusing on considerations based on the properties of CNT materials, our study provides valuable insights into accurate electrical modeling and potential advancements in CNT-based devices.

Wafer-scale striped network transistors based on purified semiconducting carbon nanotubes for commercialization.

Highly purified and solution-processed semiconducting carbon nanotubes (s-CNTs) have developed rapidly over the past several decades and are near-commercially available materials that can replace silicon due to its large-area substrate deposition and room-temperature processing compatibility. However, the more s-CNTs are purified, the better their electrical performance, but considerable effort and long centrifugation time are required, which can limit commercialization due to high manufacturing costs. In this work, we therefore fabricated 'striped' CNT network transistor across industry-standard 8 inch wafers. The stripe-structured channel is effective in lowering the manufacturing cost because it can maintain good device performance without requiring high-purity s-CNTs. We evaluated the electrical performances and their uniformity by demonstrating striped CNT network transistors fabricating from various s-CNT solutions (e.g. 99%, 95%, and 90%) in 8 inch wafers. From our results, we concluded that by optimizing the CNT network configurations, CNTs can be sufficiently utilized for commercialization technology even at low semiconducting purity. Our approach can serve as a critical foundation for future low-cost commercial CNT electronics.

Compact SPICE Model of Memristor with Barrier Modulated Considering Short- and Long-Term Memory Characteristics by IGZO Oxygen Content.

This paper introduces a compact SPICE model of a two-terminal memory with a Pd/Ti/IGZO/p+-Si structure. In this paper, short- and long-term components are systematically separated and applied in each model. Such separations are conducted by the applied bias and oxygen flow rate (OFR) during indium gallium zinc oxide (IGZO) deposition. The short- and long-term components in the potentiation and depression curves are modeled by considering the process (OFR of IGZO) and bias conditions. The compact SPICE model with the physical mechanism of SiO2 modulation is introduced, which can be useful for optimizing the specification of memristor devices.

Effect of Post-Annealing on Barrier Modulations in Pd/IGZO/SiO2/p+-Si Memristors.

In this article, we study the post-annealing effect on the synaptic characteristics in Pd/IGZO/SiO2/p+-Si memristor devices. The O-H bond in IGZO films affects the switching characteristics that can be controlled by the annealing process. We propose a switching model based on using a native oxide as the Schottky barrier. The barrier height is extracted by the conduction mechanism of thermionic emission in samples with different annealing temperatures. Additionally, the change in conductance is explained by an energy band diagram including trap models. The activation energy is obtained by the depression curve of the samples with different annealing temperatures to better understand the switching mechanism. Moreover, our results reveal that the annealing temperature and retention can affect the linearity of potentiation and depression. Finally, we investigate the effect of the annealing temperature on the recognition rate of MNIST in the proposed neural network.

Cost-effective method for fabricating carbon nanotube network transistors by reusing a 99% semiconducting carbon nanotube solution.

Carbon nanotubes (CNTs) are one-dimensional materials that have been proposed to replace silicon semiconductors and have been actively studied due to their high carrier mobility, high current density, and high mechanical flexibility. Specifically, highly purified, pre-separated, and solution-processed semiconducting CNTs are suitable for mass production. These CNTs have advantages, such as room-temperature processing compatibility, while enabling a fast and straightforward manufacturing process. In this paper, CNT network transistors were fabricated on a total of five 8 inch wafers by reusing a highly purified and pre-separated 99% semiconductor-enriched CNT solution. The results confirmed that the density of semiconducting CNTs deposited on the five selected wafers was notably uniform, even though the CNT solution was reused up to four times after the initial CNT deposition. Moreover, there was no significant degradation in the key CNT network transistor metrics. Therefore, we believe that our findings regarding this CNT reuse method may provide additional guidance in the field of wafer-scale CNT electronics and may contribute strongly to the development of practical device applications at an ultralow cost.

Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors.

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.

Characterization of Spatial Distribution of Trap Across the Substrate in Metal-Insulator-Semiconductor Structure with Band Bending Effect.

We report the technique of trap distribution extraction according to the vertical position of the substrate in the p-MOSFET. This study was conducted on a single device. This technique is an experimental method. Ctrap was extracted based on the deep depletion C-V characteristics. In VFB, the trap level is neutral. When bias is applied, the energy band bends, resulting in modulation of the quasi-Fermi level. The area created by the bending of the energy band is equal to the area created by the Fermi level modulation. The trap level existing in this area becomes charged. Considering this, the spatial distribution of Trap was extracted. The trap extracted by the proposed method has a maximum value at the interface, rapidly decreases, and is distributed up to 8 nm in the vertical direction. The study of trap spatial distribution is expected to be applicable to the separation of trap interface state and bulk trap extraction later.

Wafer-scale carbon nanotube network transistors.

Highly purified, preseparated semiconducting carbon nanotubes (CNTs) hold great potential for high-performance CNT network transistors due to their high electrical conductivity, high mechanical strength, and room-temperature processing compatibility. In this paper, we report our recent progress on CNT network transistors integrated on an 8-inch wafer. We observe that the key device performance parameters of CNT network transistors at various locations on an 8-inch wafer are highly uniform and that the device yield is impressive. Therefore, this work validates a promising path toward mass production and will make a significant contribution to the future field of wafer-scale CNT electronics.

Directly drawn top-gate semiconducting carbon nanotube thin-film transistors and complementary inverters.

As the emerging demand for electronic devices that are simple, cost effective and capable of rapid fabrication has increased, novel fabrication techniques for designing and manufacturing such devices have attracted remarkable research interest. One method for prototyping these electronic devices is to draw them using a handwriting tool that is commonly available. In this work, we demonstrate a transistor and complementary logic inverter that are directly drawn using a brush and that are based on solution-based materials such as semiconducting carbon nanotubes (CNTs), silver ink and paste, and cross-linked poly(4-vinylphenol) (cPVP). The directly drawn CNT thin-film transistor (TFT) has p-type behavior due to the adsorption of oxygen and moisture, a high current on/off ratio (approximately 103), and a low operating voltage. By employing a solution-based chemical doping treatment with an amine-rich polymer, polyethyleneimine (PEI), that has strong electron-donating ability, the drawn p-type CNT-TFT is successfully converted to an n-type CNT-TFT. Therefore, we fabricate a drawn complementary logic inverter consisting of the p-type CNT-TFT and PEI-treated n-type CNT-TFT and evaluate its electrical performance.

Characterization of Subgap Density-of-States by Sub-Bandgap Optical Charge Pumping in In0.53Ga0.47As Metal-Oxide-Semiconductor Field-Effect Transistors.

We report an experimental characterization of the interface states (Dit(E)) by using the subthreshold drain current with optical charge pumping effect in In0.53Ga0.47As metal-oxide-semiconductor fieldeffect transistors (MOSFETs). The interface states are derived from the difference between the dark and photo states of the current-voltage characteristics. We used a sub-bandgap photon (i.e., with the photon energy lower than the bandgap energy, Eph < Eg) to optically excite trapped carriers over the bandgap in In0.53Ga0.47As MOSFETs. We combined a gate bias-dependent capacitance model to determine the channel length-independent oxide capacitance. Then, we estimated the channel length-independent interface states in In0.53Ga0.47As MOSFETs having different channel lengths (Lch = 5, 10, and 25 [µm]) for a fixed overlap length (Lov = 5 [µm]).

Effect of Simultaneous Mechanical and Electrical Stress on the Electrical Performance of Flexible In-Ga-Zn-O Thin-Film Transistors.

We investigated the effect of simultaneous mechanical and electrical stress on the electrical characteristics of flexible indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs). The IGZO TFTs exhibited a threshold voltage shift (∆VTH) under an application of positive-bias-stress (PBS), with a turnaround behavior from the positive ∆VTH to the negative ∆VTH with an increase in the PBS application time, whether a mechanical stress is applied or not. However, the magnitudes of PBS-induced ∆VTH in both the positive and negative directions exhibited significantly larger values when a flexible IGZO TFT was under mechanical-bending stress than when it was at the flat state. The observed phenomena were possibly attributed to the mechanical stress-induced interface trap generation and the enhanced hydrogen diffusion from atomic layer deposition-grown Al2O3 to IGZO under mechanical-bending stress during PBS. The subgap density of states was extracted before and after an application of PBS under both mechanical stress conditions. The obtained results in this study provided potent evidence supporting the mechanism suggested to explain the PBS-induced larger ∆VTHs in both directions under mechanical-bending stress.

Ultrasensitive Electrical Detection of Hemagglutinin for Point-of-Care Detection of Influenza Virus Based on a CMP-NANA Probe and Top-Down Processed Silicon Nanowire Field-Effect Transistors.

Rather than the internal genome nucleic acids, the biomolecules on the surface of the influenza virus itself should be detected for a more exact and rapid point-of-care yes/no decision for influenza virus-induced infectious diseases. This work demonstrates the ultrasensitive electrical detection of the HA1 domain of hemagglutinin (HA), a representative viral surface protein of the influenza virus, using the top-down complementary metal oxide semiconductor (CMOS) processed silicon nanowire (SiNW) field-effect transistor (FET) configuration. Cytidine-5'-monophospho-N-acetylneuraminic acid (CMP-NANA) was employed as a probe that specifically binds both to the aldehyde self-aligned monolayer on the SiNWs and to HA1 simultaneously. CMP-NANA was serially combined with two kinds of linkers, namely 3-aminopropyltriethoxysilane and glutaraldehyde. The surface functionalization used was verified using the purification of glutathione S-transferase-tagged HA1, contact angle measurement, enzyme-linked immunosorbent assay test, and isoelectric focusing analysis. The proposed functionalized SiNW FET showed high sensitivities of the threshold voltage shift (ΔVT) ~51 mV/pH and the ΔVT = 112 mV (63 mV/decade) with an ultralow detectable range of 1 fM of target protein HA1.

Effect of Oxygen Content on Current Stress-Induced Instability in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors.

The effect of oxygen content on current-stress-induced instability was investigated in bottom-gate amorphous InGaZnO (a-IGZO) thin-film transistors. The observed positive threshold voltage shift (ΔVT) was dominated by electron trapping in the gate insulator (GI), whereas it was compensated by donor creation in a-IGZO active regions when both current flows and a high lateral electric field were present. Stress-induced ΔVT increased with increasing oxygen content irrespective of the type of stress because oxygen content influenced GI quality, i.e., higher density of GI electron traps, as well as typical direct current (DC) performance like threshold voltage, mobility, and subthreshold swing. It was also found that self-heating became another important mechanism, especially when the vertical electric field and channel current were the same, independent of the oxygen content. The increased ΔVT with oxygen content under positive gate bias stress, positive gate and drain bias stress, and target current stress was consistently explained by considering a combination of the density of GI electron traps, electric field relaxation, and self-heating-assisted electron trapping.

Flexible carbon nanotube Schottky diode and its integrated circuit applications.

Carbon nanotubes (CNTs), a low-dimensional material currently popular in industry and academia, are promising candidates for addressing the limits of existing semiconductors. In particular, CNTs are attractive candidates for flexible electronic materials due to their excellent flexibility and potential applications. In this work, we demonstrate a flexible CNT Schottky diode based on highly purified, preseparated, solution-processed 99% semiconducting CNTs and an integrated circuit application using the CNT Schottky diodes. Notably, the fabricated flexible CNT diode can greatly modulate the properties of the contact formed between the semiconducting CNT and the anode electrode via the control gate bias, exhibiting a high rectification ratio of up to 2.5 × 105. In addition, we confirm that the electrical performance of the CNT Schottky diodes does not significantly change after a few thousand bending/releasing cycles of the flexible substrate. Finally, integrated circuit (IC) applications of logic circuits (OR and AND gates) and an analog circuit (a half-wave rectifier) were presented through the use of flexible CNT Schottky diode combinations. The correct output responses are successfully achieved from the circuit applications; hence, we expect that our findings will provide a promising basis for electronic circuit applications based on CNTs.

Three-Dimensional Printed Poly(vinyl alcohol) Substrate with Controlled On-Demand Degradation for Transient Electronics.

Electronics that degrade after stable operation for a desired operating time, called transient electronics, are of great interest in many fields, including biomedical implants, secure memory devices, and environmental sensors. Thus, the development of transient materials is critical for the advancement of transient electronics and their applications. However, previous reports have mostly relied on achieving transience in aqueous solutions, where the transience time is largely predetermined based on the materials initially selected at the beginning of the fabrication. Therefore, accurate control of the transience time is difficult, thereby limiting their application. In this work, we demonstrate transient electronics based on a water-soluble poly(vinyl alcohol) (PVA) substrate on which carbon nanotube (CNT)-based field-effect transistors were fabricated. We regulated the structural parameters of the PVA substrate using a three-dimensional (3D) printer to accurately control and program the transience time of the PVA substrate in water. The 3D printing technology can produce complex objects directly, thus enabling the efficient fabrication of a transient substrate with a prescribed and controlled transience time. In addition, the 3D printer was used to develop a facile method for the selective and partial destruction of electronics.

Three-Dimensionally Printed Micro-electromechanical Switches.

Three-dimensional (3D) printers have attracted considerable attention from both industry and academia and especially in recent years because of their ability to overcome the limitations of two-dimensional (2D) processes and to enable large-scale facile integration techniques. With 3D printing technologies, complex structures can be created using only a computer-aided design file as a reference; consequently, complex shapes can be manufactured in a single step with little dependence on manufacturer technologies. In this work, we provide a first demonstration of the facile and time-saving 3D printing of two-terminal micro-electromechanical (MEM) switches. Two widely used thermoplastic materials were used to form 3D-printed MEM switches; freely suspended and fixed electrodes were printed from conductive polylactic acid, and a water-soluble sacrificial layer for air-gap formation was printed from poly(vinyl alcohol). Our 3D-printed MEM switches exhibit excellent electromechanical properties, with abrupt switching characteristics and an excellent on/off current ratio value exceeding 106. Therefore, we believe that our study makes an innovative contribution with implications for the development of a broader range of 3D printer applications (e.g., the manufacturing of various MEM devices and sensors), and the work highlights a uniquely attractive path toward the realization of 3D-printed electronics.

Determination of individual contact interfaces in carbon nanotube network-based transistors.

Carbon nanotubes (CNTs) used as semiconducting channels induce high mobility, thermal conductivity, mechanical flexibility, and chemical stability in field-effect, thin-film transistors (TFTs). However, the contact interfaces in CNT-TFTs have contact resistances that are difficult to reduce; this contact resistance can eventually limit the overall performance of CNT-TFTs. The contact interface between the source/drain electrodes and CNTs, especially for those CNT-TFTs in which the channel comprises randomly networked CNTs, plays a particularly dominant role in determining the performance and degree of variability in CNT-TFTs. However, no studies have reported a determination method that individually extracts each contact resistance at the source/drain electrodes. The present work presents an efficient method for directly determining the contact interfaces in CNT-TFTs by extracting each contact resistance produced at the source (R S ) and drain (R D ) electrodes. Moreover, we comprehensively simulated the randomly networked CNTs using an in-depth Monte-Carlo method, which provides an efficient method for visualizing the uniformity of a CNT network with various controllable CNT parameters. The proposed method provides guidance and a means for optimizing the design of the CNT network channel in CNT-TFTs and additional insights into improving the performance of CNT-TFTs.

Transparent, Flexible Strain Sensor Based on a Solution-Processed Carbon Nanotube Network.

The demands for transparent, flexible electronic devices are continuously increasing due to their potential applications to the human body. In particular, skin-like, transparent, flexible strain sensors have been developed to realize multifunctional human-machine interfaces. Here, we report a sandwich-like structured strain sensor with excellent optical transparency based on highly purified, solution-processed, 99% metallic CNT-polydimethylsiloxane (PDMS) composite thin films. Our CNT-PDMS composite strain sensors are mechanically compliant, physically robust, and easily fabricated. The fabricated strain sensors exhibit a high optical transparency of over 92% in the visible range with acceptable sensing performances in terms of sensitivity, hysteresis, linearity, and drift. We also found that the sensitivity and linearity of the strain sensors can be controlled by the number of CNT sprays; hence, our sensor can be applied and controlled based on the need of individual applications. Finally, we investigated the detections of human activities and emotions by mounting our transparent strain sensor on various spots of human skins.

The Analysis of Characteristics in Dry and Wet Environments of Silicon Nanowire-Biosensor.

Our study investigates differences in sensitivity of dry and wet environment in the field of biosensing experiment in detail and depth. The sensitivity of biosensing varies by means of surrounding conditions of silicon nanowire field effect transistor (SiNW FET). By examining charged polymer reaction in the silicon nanowire transistor (SiNW), we have discovered that the threshold voltage (V(T)) shift and change of subthreshold slope (SS) in wet environment are smaller than that of the air. Furthermore, we analyzed the sensitivity through modifying electrolyte concentration in the wet condition, and confirmed that V(T) shift increases in low concentration condition of phosphate buffered saline (PBS) due to the Debye length. We believe that the results we have found in this study would be the cornerstone in contributing to advanced biosensing experiment in the future.