Strong Immunity to Drain-Induced Barrier Lowering in ALD-Grown Preferentially Oriented Indium Gallium Oxide Transistors.

Drain-induced barrier lowering (DIBL) is one of the most critical obstacles degrading the reliability of integrated circuits based on miniaturized transistors. Here, the effect of a crystallographic structure change in InGaO [indium gallium oxide (IGO)] thin-films on the DIBL was investigated. Preferentially oriented IGO (po-IGO) thin-film transistors (TFTs) have outstanding device performances with a field-effect mobility of 81.9 ± 1.3 cm2/(V s), a threshold voltage (VTH) of 0.07 ± 0.03 V, a subthreshold swing of 127 ± 2.0 mV/dec, and a current modulation ratio of (2.9 ± 0.2) × 1011. They also exhibit highly reliable electrical characteristics with a negligible VTH shift of +0.09 (-0.14) V under +2 (-2) MV/cm and 60 °C for 3600 s. More importantly, they reveal strong immunity to the DIBL of 17.5 ± 1.2 mV/V, while random polycrystalline In2O3 (rp-In2O3) and IGO (rp-IGO) TFTs show DIBL values of 197 ± 5.3 and 46.4 ± 1.2 mV/V, respectively. This is quite interesting because the rp- and po-IGO thin-films have the same cation composition ratio (In/Ga = 8:2). Given that the lateral diffusion of oxygen vacancies from the source/drain junction to the channel region via grain boundaries can reduce the effective length (Leff) of the oxide channel, this improved immunity could be attributed to suppressed lateral diffusion by preferential growth. In practice, the po-IGO TFTs have a longer Leff than the rp-In2O3 and -IGO TFTs even with the same patterned length. The effect of the crystallographic-structure-dependent Leff variation on the DIBL was corroborated by technological computer-aided design simulation. This work suggests that the atomic-layer-deposited po-IGO thin-film can be a promising candidate for next-generation electronic devices composed of the miniaturized oxide transistors.

Double-gate structure enabling remote Coulomb scattering-free transport in atomic-layer-deposited IGO thin-film transistors with HfO2 gate dielectric through insertion of SiO2 interlayer.

In this paper, high-performance indium gallium oxide (IGO) thin-film transistor (TFT) with a double-gate (DG) structure was developed using an atomic layer deposition route. The device consisting of 10-nm-thick IGO channel and 2/48-nm-thick SiO2/HfO2 dielectric was designed to be suitable for a display backplane in augmented and virtual reality applications. The fabricated DG TFTs exhibit outstanding device performances with field-effect mobility (µFE) of 65.1 ± 2.3 cm2V-1 s-1, subthreshold swing of 65 ± 1 mVdec-1, and threshold voltage (VTH) of 0.42 ± 0.05 V. Both the (µFE) and SS are considerably improved by more than two-fold in the DG IGO TFTs compared to single-gate (SG) IGO TFTs. Important finding was that the DG mode of IGO TFTs exhibits the nearly temperature independent µFE variations in contrast to the SG mode which suffers from the severe remote Coulomb scattering. The rationale for this disparity is discussed in detail based on the potential distribution along the vertical direction using technology computer-aided design simulation. Furthermore, the DG IGO TFTs exhibit a greatly improved reliability with negligible VTH shift of - 0.22 V under a harsh negative bias thermal and illumination stress condition with an electric field of - 2 MVcm-1 and blue light illumination at 80 °C for 3600 s. It could be attributed to the increased electrostatic potential that results in fast re-trapping of the electrons generated by the light-induced ionization of deep level oxygen vacancy defects.

High Mobility IZTO Thin-Film Transistors Based on Spinel Phase Formation at Low Temperature through a Catalytic Chemical Reaction.

In this paper, In0.22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) films with a single spinel phase are successfully grown at the low temperature of 300 °C through careful cation composition design and a catalytic chemical reaction. Thin-film transistors (TFTs) with amorphous In0 .22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) channel layers have a reasonable mobility of 41.0 cm2 V-1 s-1 due to the synergic intercalation of In and Sn ions. In contrast, TFTs with polycrystalline spinel In0 .22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) channel layers, achieved through a metal-induced crystallization at 300 °C, exhibit a remarkably high field-effect mobility of ≈83.2 cm2 V-1 s-1 and excellent stability against external gate bias stress, which is attributed to the uniform formation of the highly ordered spinel phase. The relationships between cation composition, microstructure, and performance for the In2 O3 -ZnO-SnO2 ternary component system are investigated rigorously to attain in-depth understanding of the roles of various crystalline phases, including spinel Zn2- y Sn1- y In2 y O4 (y = 0.45), bixbyite In2-2 x Znx Inx O4 (x = 0.4), rutile SnO2 , and a homologous compound of compound (ZnO)k (In2 O3 ) (k = 5). This work concludes that the cubic spinel phase of Zn2- y Sn1- y In2 y O4 (y = 0.45) film is a strong contender as a substitute for semiconducting polysilicon as a backplane channel ingredient for mobile active-matrix organic light-emitting diode displays.