Determination of exciton binding energy using photocurrent spectroscopy of Ge quantum-dot single-hole transistors under CW pumping.

We reported exciton binding-energy determination using tunneling-current spectroscopy of Germanium (Ge) quantum dot (QD) single-hole transistors (SHTs) operating in the few-hole regime, under 405-1550 nm wavelength (λ) illumination. When the photon energy is smaller than the bandgap energy (1.46 eV) of a 20 nm Ge QD (for instance, λ = 1310 nm and 1550 nm illuminations), there is no change in the peak voltages of tunneling current spectroscopy even when the irradiation power density reaches as high as 10 µW/µm2. In contrast, a considerable shift in the first hole-tunneling current peak towards positive VG is induced (ΔVG ≈ 0.08 V at 0.33 nW/µm2 and 0.15 V at 1.4 nW/µm2) and even additional photocurrent peaks are created at higher positive VG values (ΔVG ≈ 0.2 V at 10 nW/µm2 irradiation) by illumination at λ = 850 nm (where the photon energy matches the bandgap energy of the 20 nm Ge QD). These experimental observations were further strengthened when Ge-QD SHTs were illuminated by λ = 405 nm lasers at much lower optical-power conditions. The newly-photogenerated current peaks are attributed to the contribution of exciton, biexciton, and positive trion complexes. Furthermore, the exciton binding energy can be determined by analyzing the tunneling current spectra.

Room-Temperature Fabrication of p-Type SnO Semiconductors Using Ion-Beam-Assisted Deposition.

Over the past decade, SnO has been considered a promising p-type oxide semiconductor. However, achieving high mobility in the fabrication of p-type SnO films is still highly dependent on the post-annealing procedure, which is often used to make SnO, due to its metastable nature, readily convertible to SnO2 and/or intermediate phases. This paper demonstrates a fully room-temperature fabrication of p-type SnOx thin films using ion-beam-assisted deposition. This technique offers independent control between ion density, via the ion-gun anode current and oxygen flow rate, and ion energy, via the ion-gun anode voltage, thus being able to optimize the optical band gap and the hole mobility of the SnO films to reach 2.70 eV and 7.89 cm2 V-1 s-1, respectively, without the need for annealing. Remarkably, this is the highest mobility reported for p-type SnO films whose fabrication was carried out entirely at room temperature. Using first-principles calculations, we rationalize that the high mobility is associated with the fine-tuning of the Sn-rich-related defects and lattice densification, obtained by controlling the density and energy of the oxygen ions, both of which optimize the spatial overlap of the valence bands to form a continuous conduction path for the holes. Moreover, due to the absence of the annealing process, the Raman spectra reveal no significant signatures of microcrystal formation in the films. This behavior contrasts with the case involving the air-annealing procedure, where a complex interaction occurs between the formation of SnO microcrystals and the formation of SnOx intermediate phases. This interplay results in variations in grain texture within the film, leading to a lower optimum Hall mobility of only 5.17 cm2 V-1 s-1. Finally, we demonstrate the rectification characteristics of all-fabricated-at-room-temperature SnOx-based p-n devices to confirm the viability of the p-type SnOx films.

Germanium Quantum-Dot Array with Self-Aligned Electrodes for Quantum Electronic Devices.

Semiconductor-based quantum registers require scalable quantum-dots (QDs) to be accurately located in close proximity to and independently addressable by external electrodes. Si-based QD qubits have been realized in various lithographically-defined Si/SiGe heterostructures and validated only for milli-Kelvin temperature operation. QD qubits have recently been explored in germanium (Ge) materials systems that are envisaged to operate at higher temperatures, relax lithographic-fabrication requirements, and scale up to large quantum systems. We report the unique scalability and tunability of Ge spherical-shaped QDs that are controllably located, closely coupled between each another, and self-aligned with control electrodes, using a coordinated combination of lithographic patterning and self-assembled growth. The core experimental design is based on the thermal oxidation of poly-SiGe spacer islands located at each sidewall corner or included-angle location of Si3N4/Si-ridges with specially designed fanout structures. Multiple Ge QDs with good tunability in QD sizes and self-aligned electrodes were controllably achieved. Spherical-shaped Ge QDs are closely coupled to each other via coupling barriers of Si3N4 spacer layers/c-Si that are electrically tunable via self-aligned poly-Si or polycide electrodes. Our ability to place size-tunable spherical Ge QDs at any desired location, therefore, offers a large parameter space within which to design novel quantum electronic devices.

Tunable diameter and spacing of double Ge quantum dots using highly-controllable spacers and selective oxidation of SiGe.

We report the novel tunability of the diameters and spacings of paired Ge double quantum dots (DQDs) using nano-spacer technology in combination with selective oxidation of Si0.85Ge0.15 at high temperature. Pairs of spherical-shaped Ge QDs were formed by the selective oxidation of poly-SiGe spacer islands at each sidewall corner of the nano-patterned Si3N4/poly-Si ridges. The diameters of the Ge spherical QDs are essentially determined by geometrical conditions (height, width, and length) of the nano-patterned spacer islands of poly-SiGe, which are tunable by adjusting the process times of deposition and etch back for poly-SiGe spacer layers in combination with the exposure dose of electron-beam lithography. Most importantly, the separations between the Ge DQDs are controllable by adjusting the widths of the poly-Si/Si3N4 ridges and the thermal oxidation times. Our self-organization and self-alignment approach achieved high symmetry within the Ge DQDs in terms of the individual QD diameters as well as the coupling barriers between the QDs and external electrodes in close proximity.

Ge nanodot-mediated densification and crystallization of low-pressure chemical vapor deposited Si3N4 for advanced complementary metal-oxide-semiconductor photonics and electronics applications.

A new phenomenon of highly localized, nanoscale densification and crystallization of silicon-nitride (Si3N4) layers has been observed. A drastic reduction in the thermal budget (temperature and processing time) for local densification and even nanocrystallization of low-pressure chemical vapor deposited amorphous Si3N4 layers is mediated by the presence of Ge, Si, and O interstitials in close proximity to the Si3N4. The enhancement of localized densification and nanocrystallization observed in Si3N4 layers appears to be catalyzed by proximal Ge quantum dots (QDs) 'migrating' through the Si3N4/Si layers and are influenced by the oxidation time and Ge QD size. Implications of the highly localized, nanoscale densification and crystallization of silicon-nitride (Si3N4) layers for photonic and electronic device applications are discussed.

Very large photoresponsiviy and high photocurrent linearity for Ge-dot/SiO2/SiGe photoMOSFETs under gate modulation.

We report a novel visible-near infrared photoMOSFET containing a self-organized, gate-stacking heterostructure of SiO2/Ge-dot/SiO2/SiGe-channel on Si substrate that is simultaneously fabricated in a single oxidation step. Our typical photoMOSFETs exhibit very large photoresponsivity of 1000-3000A/W at low optical power (< 0.1µW) or large photocurrent gain of 103-108A/A with a wide dynamic power range of at least 6 orders of magnitude (nW-mW) linearity at 400-1250 nm illumination, depending on whether the photoMOSFET operates at VG = + 3- + 4.5V or -1- + 1V. Numerical simulations reveal that photocarrier confinement within the Ge dots and the SiGe channel modifies the oxide field and the surface potential of SiGe, significantly increasing photocurrent and improving linearity.

High Photoresponsivity Ge-dot PhotoMOSFETs for Low-power Monolithically-Integrated Si Optical Interconnects.

We report the demonstration of high-photoresponsivity Ge-dot photoMOSFETs in a standard MOS configuration for the detection of 850-1550 nm illumination. Each device has a self-organized, gate-stacking heterostructure of SiO2/Ge-dot/SiO2/SiGe-channel which is simultaneously fabricated in a single oxidation step. Superior control of the geometrical size and chemical composition for our Ge nanodots/SiO2/Si1-xGex-shell MOS structure enables the practically-achievable, gate-stacking design for our Ge-dot photoMOSFETs. Both the gate oxide thickness and the diameter of the Ge dots are controllable. Large photocurrent enhancement was achieved for our Ge-dot photoMOSFETs when electrically-biased at ON- and OFF-states based on the Ge dot mediating photovoltaic and photoconductive effects, respectively. Both photoelectric conversion efficiency and response speed are significantly improved by reducing the gate-oxide thickness from 38.5 nm to 3.5 nm, and by decreasing Ge-dot size from 90 nm to 50 nm for a given areal density of Ge dots. Photoresponsivity () values as high as 1.2 × 104 A/W and 300 A/W are measured for 10 nW illumination at 850 nm and 1550 nm, respectively. A response time of 0.48 ns and a 3 dB-frequency of 2 GHz were achieved for 50 nm-Ge-dot photoMOSFETs with channel lengths of 3 µm under pulsed 850 nm illumination.

Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique.

In this work, we present a gate-all-around (GAA) low-temperature poly-Si nanowire (NW) junctionless device with TiN/Al.

A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires.

In this paper, a silicon-oxide-nitride-silicon nonvolatile memory constructed on an n+-poly-Si nanowire [NW] structure featuring a junctionless [JL] configuration is presented. The JL structure is fulfilled by employing only one in situ heavily phosphorous-doped poly-Si layer to simultaneously serve as source/drain regions and NW channels, thus greatly simplifying the manufacturing process and alleviating the requirement of precise control of the doping profile. Owing to the higher carrier concentration in the channel, the developed JL NW device exhibits significantly enhanced programming speed and larger memory window than its counterpart with conventional undoped-NW-channel. Moreover, it also displays acceptable erase and data retention properties. Hence, the desirable memory characteristics along with the much simplified fabrication process make the JL NW memory structure a promising candidate for future system-on-panel and three-dimensional ultrahigh density memory applications.

A study on low temperature transport properties of independent double-gated poly-Si nanowire transistors.

Employing mix-and-match lithography of I-line stepper and e-beam direct writing, independent double-gated poly-Si nanowire thin film transistors with channel lengths ranging from 70 nm to 5 µm were fabricated and characterized. Electrical measurements performed under cryogenic ambient displayed intriguing characteristics in terms of length dependent abrupt switching behavior for one of the single-gated modes. Through simulation and experimental verification, the root cause for this phenomenon was identified to be the non-uniformly distributed dopants introduced by ion implantation.

Poly-silicon nanowire field-effect transistor for ultrasensitive and label-free detection of pathogenic avian influenza DNA.

Enhanced surveillance of influenza requires rapid, robust, and inexpensive analytical techniques capable of providing a detailed analysis of influenza virus strains. Functionalized poly-crystalline silicon nanowire field-effect transistor (poly-SiNW FET) was demonstrated to achieve specific and ultrasensitive (at fM level) detection of high pathogenic strain virus (H5 and H7) DNA of avian influenza (AI) which is an important infectious disease and has an immediate need for surveillance. The poly-SiNW FET was prepared by a simple and low-cost method that is compatible with current commercial semiconductor process without expensive E-beam lithography tools for large-scale production. Specific electric changes were observed for AI virus DNA sensing when nanowire surface of poly-SiNW FET was modified with complementary captured DNA probe and target DNA (H5) at fM to pM range could be distinguished. With its excellent electric properties and potential for mass commercial production, poly-SiNW FET can be developed to become a portable biosensor for field use and point-of-care diagnoses.