Alternatives to aluminum gates for silicon quantum devices: defects and strain.

Gate-defined quantum dots (QD) benefit from the use of small grain size metals for gate materials because it aids in shrinking the device dimensions. However, it is not clear what differences arise with respect to process-induced defect densities and inhomogeneous strain. Here, we present measurements of fixed charge, Q f , interface trap density, D it , the intrinsic film stress, σ, and the coefficient of thermal expansion, α as a function of forming gas anneal temperature for Al, Ti/Pd, and Ti/Pt gates. We show D it is minimal at an anneal temperature of 350 °C for all materials but Ti/Pd and Ti/Pt have higher Q f and D it compared to Al. In addition, σ and α increase with anneal temperature for all three metals with α larger than the bulk value. These results indicate that there is a tradeoff between minimizing defects and minimizing the impact of strain in quantum device fabrication.

Electronic properties and structure of single crystal perylene.

The transport properties of electronic devices made from single crystalline molecular semiconductors typically outperform those composed of thin-films of the same material. To further understand the superiority of these extrinsic device properties, an understanding of the intrinsic electronic structure and properties of the organic semiconductor is necessary. An investigation of the electronic structure and properties of single crystal α-phase perylene (C20H12), a five-ringed aromatic molecule, is presented using angle-resolved ultraviolet photoemission, x-ray photoelectron spectroscopy (XPS), and field-effect transistor measurements. Key aspects of the electronic structure of single crystal α-perylene critical to charge transport are determined, including the energetic location of the highest occupied molecular orbital (HOMO), the HOMO bandwidth, and surface work function. In addition, using high resolution XPS, we can distinguish between inequivalent carbon atoms within the perylene crystal and, from the shake-up satellite structure in XPS, gain insight into the intramolecular properties in α-perylene. From the device measurements, the charge carrier mobility of α-perylene is found to depend on the device structure and the choice of dielectric, with values in the range of 10-3 cm2 V-1 s-1.

Interface Engineering for Nanoelectronics.

Innovation in the electronics industry is tied to interface engineering as devices increasingly incorporate new materials and shrink. Molecular layers offer a versatile means of tuning interfacial electronic, chemical, physical, and magnetic properties enabled by a wide variety of molecules available. This paper will describe three instances where we manipulate molecular interfaces with a specific focus on the nanometer scale characterization and the impact on the resulting performance. The three primary themes include, 1-designer interfaces, 2-electronic junction formation, and 3-advancing metrology for nanoelectronics. We show the ability to engineer interfaces through a variety of techniques and demonstrate the impact on technologies such as molecular memory and spin injection for organic electronics. Underpinning the successful modification of interfaces is the ability to accurately characterize the chemical and electronic properties and we will highlight some measurement advances key to our understanding of the interface engineering for nanoelectronics.