Implementation and integration of image processing blocks in a real-time bottle classification system.

A practical solution to the problems caused by the water, air, and soil pollution produced by the large volumes of waste is recycling. Plastic and glass bottle recycling is a practical solution but sometimes unfeasible in underdeveloped countries. In this paper, we propose a high-performance real-time hardware architecture for bottle classification, that process input image bottles to generate a bottle color as output. The proposed architecture was implemented on a Spartan-6 Field Programmable Gate Array, using a Hardware Description Language. The proposed system was tested for several input resolutions up to 1080 p, but it is flexible enough to support input video resolutions up to 8 K. There is no evidence of a high-performance bottle classification system in the state-of-the-art. The main contribution of this paper is the implementation and integration of a set of dedicated image processing blocks in a high-performance real-time bottle classification system. These hardware modules were integrated into a compact and tunable architecture, and was tested in a simulated environment. Concerning the image processing algorithm implemented in the FPGA, the maximum processing rate is 60 frames per second. In practice, the maximum number of bottles that can be processed would be limited by the mechanical aspects of the bottle transportation system.

A Spatio-Temporal Approach to Individual Mobility Modeling in On-Device Cognitive Computing Platforms.

The increased availability of GPS-enabled devices makes possible to collect location data for mining purposes and to develop mobility-based services (MBS). For most of the MBSs, determining interesting locations and frequent Points of Interest (POIs) is of paramount importance to study the semantic of places visited by an individual and the mobility patterns as a spatio-temporal phenomenon. In this paper, we propose a novel approach that uses mobility-based services for on-device and individual-centered mobility understanding. Unlike existing approaches that use crowd data for cloud-assisted POI extraction, the proposed solution autonomously detects POIs and mobility events to incrementally construct a cognitive map (spatio-temporal model) of individual mobility suitable to constrained mobile platforms. In particular, we focus on detecting POIs and enter-exits events as the key to derive statistical properties for characterizing the dynamics of an individual's mobility. We show that the proposed spatio-temporal map effectively extracts core features from the user-POI interaction that are relevant for analytics such as mobility prediction. We also demonstrate how the obtained spatio-temporal model can be exploited to assess the relevance of daily mobility routines. This novel cognitive and on-line mobility modeling contributes toward the distributed intelligence of IoT connected devices without strongly compromising energy.

A Cognitive-Inspired Event-Based Control for Power-Aware Human Mobility Analysis in IoT Devices.

Mobile Edge Computing (MEC) relates to the deployment of decision-making processes at the network edge or mobile devices rather than in a centralized network entity like the cloud. This paradigm shift is acknowledged as one key pillar to enable autonomous operation and self-awareness in mobile devices in IoT. Under this paradigm, we focus on mobility-based services (MBSs), where mobile devices are expected to perform energy-efficient GPS data acquisition while also providing location accuracy. We rely on a fully on-device Cognitive Dynamic Systems (CDS) platform to propose and evaluate a cognitive controller aimed at both tackling the presence of uncertainties and exploiting the mobility information learned by such CDS toward energy-efficient and accurate location tracking via mobility-aware sampling policies. We performed a set of experiments and validated that the proposed control strategy outperformed similar approaches in terms of energy savings and spatio-temporal accuracy in LBS and MBS for smartphone devices.

On-Device Learning of Indoor Location for WiFi Fingerprint Approach.

Indoor positioning is a recent technology that has gained interest in industry and academia thanks to the promising results of locating objects, people or robots accurately in indoor environments. One of the utilized technologies is based on algorithms that process the Received Signal Strength Indicator (RSSI) in order to infer location information without previous knowledge of the distribution of the Access Points (APs) in the area of interest. This paper presents the design and implementation of an indoor positioning mobile application, which allows users to capture and build their own RSSI maps by off-line training of a set of selected classifiers and using the models generated to obtain the current indoor location of the target device. In an early experimental and design stage, 59 classifiers were evaluated, using data from proposed indoor scenarios. Then, from the tested classifiers in the early stage, only the top-five classifiers were integrated with the proposed mobile indoor positioning, based on the accuracy obtained for the test scenarios. The proposed indoor application achieves high classification rates, above 89%, for at least 10 different locations in indoor environments, where each location has a minimum separation of 0.5 m.

Full On-Device Stay Points Detection in Smartphones for Location-Based Mobile Applications.

The tracking of frequently visited places, also known as stay points, is a critical feature in location-aware mobile applications as a way to adapt the information and services provided to smartphones users according to their moving patterns. Location based applications usually employ the GPS receiver along with Wi-Fi hot-spots and cellular cell tower mechanisms for estimating user location. Typically, fine-grained GPS location data are collected by the smartphone and transferred to dedicated servers for trajectory analysis and stay points detection. Such Mobile Cloud Computing approach has been successfully employed for extending smartphone's battery lifetime by exchanging computation costs, assuming that on-device stay points detection is prohibitive. In this article, we propose and validate the feasibility of having an alternative event-driven mechanism for stay points detection that is executed fully on-device, and that provides higher energy savings by avoiding communication costs. Our solution is encapsulated in a sensing middleware for Android smartphones, where a stream of GPS location updates is collected in the background, supporting duty cycling schemes, and incrementally analyzed following an event-driven paradigm for stay points detection. To evaluate the performance of the proposed middleware, real world experiments were conducted under different stress levels, validating its power efficiency when compared against a Mobile Cloud Computing oriented solution.

Mobile phone middleware architecture for energy and context awareness in location-based services.

The disruptive innovation of smartphone technology has enabled the development of mobile sensing applications leveraged on specialized sensors embedded in the device. These novel mobile phone applications rely on advanced sensor information processes, which mainly involve raw data acquisition, feature extraction, data interpretation and transmission. However, the continuous accessing of sensing resources to acquire sensor data in smartphones is still very expensive in terms of energy, particularly due to the periodic use of power-intensive sensors, such as the Global Positioning System (GPS) receiver. The key underlying idea to design energy-efficient schemes is to control the duty cycle of the GPS receiver. However, adapting the sensing rate based on dynamic context changes through a flexible middleware has received little attention in the literature. In this paper, we propose a novel modular middleware architecture and runtime environment to directly interface with application programming interfaces (APIs) and embedded sensors in order to manage the duty cycle process based on energy and context aspects. The proposed solution has been implemented in the Android software stack. It allows continuous location tracking in a timely manner and in a transparent way to the user. It also enables the deployment of sensing policies to appropriately control the sampling rate based on both energy and perceived context. We validate the proposed solution taking into account a reference location-based service (LBS) architecture. A cloud-based storage service along with online mobility analysis tools have been used to store and access sensed data. Experimental measurements demonstrate the feasibility and efficiency of our middleware, in terms of energy and location resolution.

Resource efficient hardware architecture for fast computation of running max/min filters.

Running max/min filters on rectangular kernels are widely used in many digital signal and image processing applications. Filtering with a k × k kernel requires of k(2) - 1 comparisons per sample for a direct implementation; thus, performance scales expensively with the kernel size k. Faster computations can be achieved by kernel decomposition and using constant time one-dimensional algorithms on custom hardware. This paper presents a hardware architecture for real-time computation of running max/min filters based on the van Herk/Gil-Werman (HGW) algorithm. The proposed architecture design uses less computation and memory resources than previously reported architectures when targeted to Field Programmable Gate Array (FPGA) devices. Implementation results show that the architecture is able to compute max/min filters, on 1024 × 1024 images with up to 255 × 255 kernels, in around 8.4 milliseconds, 120 frames per second, at a clock frequency of 250 MHz. The implementation is highly scalable for the kernel size with good performance/area tradeoff suitable for embedded applications. The applicability of the architecture is shown for local adaptive image thresholding.

FPGA implementation of a configurable neuromorphic CPG-based locomotion controller.

Neuromorphic engineering is a discipline devoted to the design and development of computational hardware that mimics the characteristics and capabilities of neuro-biological systems. In recent years, neuromorphic hardware systems have been implemented using a hybrid approach incorporating digital hardware so as to provide flexibility and scalability at the cost of power efficiency and some biological realism. This paper proposes an FPGA-based neuromorphic-like embedded system on a chip to generate locomotion patterns of periodic rhythmic movements inspired by Central Pattern Generators (CPGs). The proposed implementation follows a top-down approach where modularity and hierarchy are two desirable features. The locomotion controller is based on CPG models to produce rhythmic locomotion patterns or gaits for legged robots such as quadrupeds and hexapods. The architecture is configurable and scalable for robots with either different morphologies or different degrees of freedom (DOFs). Experiments performed on a real robot are presented and discussed. The obtained results demonstrate that the CPG-based controller provides the necessary flexibility to generate different rhythmic patterns at run-time suitable for adaptable locomotion.

The role of the asymptotic dynamics in the design of FPGA-based hardware implementations of gIF-type neural networks.

This paper presents a numerical analysis of the role of asymptotic dynamics in the design of hardware-based implementations of the generalised integrate-and-fire (gIF) neuron models. These proposed implementations are based on extensions of the discrete-time spiking neuron model, which was introduced by Soula et al., and have been implemented on Field Programmable Gate Array (FPGA) devices using fixed-point arithmetic. Mathematical studies conducted by Cessac have evidenced the existence of three main regimes (neural death, periodic and chaotic regimes) in the activity of such neuron models. These activity regimes are characterised in hardware by considering a precision analysis in the design of an architecture for an FPGA-based implementation. The proposed approach, although based on gIF neuron models and FPGA hardware, can be extended to more complex neuron models as well as to different in silico implementations.

On-chip visual perception of motion: a bio-inspired connectionist model on FPGA.

Visual motion provides useful information to understand the dynamics of a scene to allow intelligent systems interact with their environment. Motion computation is usually restricted by real time requirements that need the design and implementation of specific hardware architectures. In this paper, the design of hardware architecture for a bio-inspired neural model for motion estimation is presented. The motion estimation is based on a strongly localized bio-inspired connectionist model with a particular adaptation of spatio-temporal Gabor-like filtering. The architecture is constituted by three main modules that perform spatial, temporal, and excitatory-inhibitory connectionist processing. The biomimetic architecture is modeled, simulated and validated in VHDL. The synthesis results on a Field Programmable Gate Array (FPGA) device show the potential achievement of real-time performance at an affordable silicon area.