Si3N4-plasmonic ferroelectric MZIR modulator for 112-Gbaud PAM-4 transmission in the O-band.

This paper presents a simulation-based analysis on the performance of plasmonic ferroelectric Mach-Zehnder in a ring (MZIR) versus symmetric Mach-Zehnder modulators (MZMs) on Si3N4 targeting O-band operation. The detailed investigation reveals the tradeoff between Au and Ag legacy noble metals providing lower modulator losses and CMOS compatible Cu featuring low cost. The numerical models also show that by opting for the MZIR layout there is a reduction in the Vπ x L product of 46% for Ag, 39% for Au and 30% for Cu versus MZMs. Time-domain simulations verify the successful generation of 112 Gbaud PAM-4 Signals from both MZIRs and MZMs for as low as 2 × 1.3 Vpp and 5µm long plasmonic phase shifters (PSs) with MZIRs providing a ΔQ signal improvement over MZMs of 2.9, 2.4, and 1.3 for Ag, Au, and Cu metals respectively. To the best of our knowledge, this is the first theoretical demonstration of such a low-loss, low-voltage, high-speed, and CMOS compatible plasmonic modulator on Si3N4, in the O-band.

Efficient multi-step coupling between Si3N4 waveguides and CMOS plasmonic ferroelectric phase shifters in the O-band.

In this paper we present a thorough simulation-based analysis for the design of multi-step couplers bridging seamlessly plasmonic barium titanate oxide (BTO) ferroelectric phase shifters and thick silicon nitride (Si3N4) waveguides for the O-band. The targeted plasmonic waveguides are a hybrid plasmonic waveguide (HPW) providing low propagation losses and a plasmonic metal-insulator-metal (MIM) slot waveguide offering a high confinement factor for high modulation efficiency. The proposed plasmonic platforms are formed by Copper (Cu) providing CMOS compatibility. The analysis is based on 2D-FD eigenvalue and 3D-FDTD numerical simulations targeting to identify the optimum geometries ensuring the lowest coupling losses, calculated as 1.75dB for the HPW geometry and 1.29dB for the MIM configuration. The corresponding confinement factors are 31.39% and 56.2% for the HPW and MIM waveguides, respectively.

Design of Si-rich nitride interposer waveguides for efficient light coupling from InP-based QD-emitters to Si3N4 waveguides on a silicon substrate.

In this paper, we present a systematic analysis for the design of Si-rich-nitride (SRN) based interposer waveguide layers interfacing InP-based devices and Si3N4 waveguides, towards monolithic co-integration of active and passive elements through a Back-End-Of-Line process. The investigation is performed via extensive 2D-eigenvalue and 3D-FDTD electromagnetic simulations and focuses on three different interposer designs, where performance in terms of coupling loss and back reflections is exchanged for fabrication complexity. In addition, a tolerance analysis is performed for the demonstration of the proposed coupling scheme's resilience to fabrication misalignments. The calculations use for the refractive index of the SRN interposer, real values extracted from ellipsometry measurements of a novel ultra-Si-rich-nitride material developed and engineered for this purpose. This new material provides tunability in the real part of the refractive index with low-stress crack free samples grown up to 500nm thickness. Test structures with cutbacks featuring waveguides of 500 × 500nm2 cross section formed via e-beam lithography reveal 15dB/cm propagation losses in line with similar amorphous silicon-rich nitride (aSi:N) materials. The proposed coupling concept although assumes an InP active medium, can be applied also with GaAs based lasers and dual facet devices such as Semiconductor Optical Amplifiers (SOAs) and electroabsorption modulators. In addition, all proposed designs are compatible in terms of critical dimensions with low cost 248nm DUV lithography targeting to maximize the low-cost advantage of the Si3N4 platform with very high coupling performance. Our results are expected to pave the way for the generation of a versatile, low cost, high performance monolithic InP-Quantum-Dot (QD)/Si3N4 platform on a common Si substrate.

An all-optical neuron with sigmoid activation function.

We present an all-optical neuron that utilizes a logistic sigmoid activation function, using a Wavelength-Division Multiplexing (WDM) input & weighting scheme. The activation function is realized by means of a deeply-saturated differentially-biased Semiconductor Optical Amplifier-Mach-Zehnder Interferometer (SOA-MZI) followed by a SOA-Cross-Gain-Modulation (XGM) gate. Its transfer function is both experimentally and theoretically analyzed, showing excellent agreement between theory and experiment and an almost perfect fitting with a logistic sigmoid function. The optical sigmoid transfer function is then exploited in the experimental demonstration of a photonic neuron, demonstrating successful thresholding over a 100psec-long pulse sequence with 4 different weighted-and-summed power levels.

0.48Tb/s (12x40Gb/s) WDM transmission and high-quality thermo-optic switching in dielectric loaded plasmonics.

We demonstrate Wavelength Division Multiplexed (WDM)-enabled transmission of 480Gb/s aggregate data traffic (12x40Gb/s) as well as high-quality 1x2 thermo-optic tuning in Dielectric-Loaded Surface Plasmon Polariton Waveguides (DLSPPWs). The WDM transmission characteristics have been verified through BER measurements by exploiting the heterointegration of a 60 µm-long straight DLSPPW on a Silicon-on-Insulator waveguide platform, showing error-free performance for six out of the twelve channels. High-quality thermo-optic tuning has been achieved by utilizing Cycloaliphatic-Acrylate-Polymer as an efficient thermo-optic polymer loading employed in a dual-resonator DLSPPW switching structure, yielding a 9 nm wavelength shift and extinction ratio values higher than 10 dB at both output ports when heated to 90°C.

Fabrication and experimental demonstration of the first 160 Gb/s hybrid silicon-on-insulator integrated all-optical wavelength converter.

We present a hybrid integrated photonic circuit on a silicon-on-insulator substrate that performs ultra high-speed all-optical wavelength conversion. The chip incorporates a 1.25 mm non-linear SOA mounted on the SOI board using gold-tin bumps as small as 14 µm. Τhe device performs chirp filtering and signal polarity inversion with two multi-mode interference (MMI) - based cascaded delay interferometers (DIs) monolithically integrated on the same SOI substrate. Full free spectral range (FSR) tuning of the DIs is accomplished by two independently tuneable on-chip thermal heaters. We demonstrate 160Gb/s all-optical wavelength conversion with power penalties of less than 4.6dB.