Temperature-Dependent Opacity of the Gate Field Inside MoS2 Field-Effect Transistors.

The transport behaviors of MoS2 field-effect transistors (FETs) with various channel thicknesses are studied. In a 12 nm thick MoS2 FET, a typical switching behavior is observed with an Ion/Ioff ratio of 106. However, in 70 nm thick MoS2 FETs, the gating effect weakens with a large off-current, resulting from the screening of the gate field by the carriers formed through the ionization of S vacancies at 300 K. Hence, when the latter is dual-gated, two independent conductions develop with different threshold voltage (VTH) and field-effect mobility (µFE) values. When the temperature is lowered for the latter, both the ionization of S vacancies and the gate-field screening reduce, which revives the strong Ion/Ioff ratio and merges the two separate channels into one. Thus, only one each of VTH and µFE are seen from the thick MoS2 FET when the temperature is less than 80 K. The change of the number of conduction channels is attributed to the ionization of S vacancies, which leads to a temperature-dependent intra- and interlayer conductance and the attenuation of the electrostatic gate field. The defect-related transport behavior of thick MoS2 enables us to propose a new device structure that can be further developed to a vertical inverter inside a single MoS2 flake.

Coulomb scattering mechanism transition in 2D layered MoTe2: effect of high-κ passivation and Schottky barrier height.

Clean interface and low contact resistance are crucial requirements in two-dimensional (2D) materials to preserve their intrinsic carrier mobility. However, atomically thin 2D materials are sensitive to undesired Coulomb scatterers such as surface/interface adsorbates, metal-to-semiconductor Schottky barrier (SB), and ionic charges in the gate oxides, which often limits the understanding of the charge scattering mechanism in 2D electronic systems. Here, we present the effects of hafnium dioxide (HfO2) high-κ passivation and SB height on the low-frequency (LF) noise characteristics of multilayer molybdenum ditelluride (MoTe2) transistors. The passivated HfO2 passivation layer significantly suppresses the surface reaction and enhances dielectric screening effect, resulting in an excess electron n-doping, zero hysteresis, and substantial improvement in carrier mobility. After the high-κ HfO2 passivation, the obtained LF noise data appropriately demonstrates the transition of the Coulomb scattering mechanism from the SB contact to the channel, revealing the significant SB noise contribution to the 1/f noise. The substantial excess LF noise in the subthreshold regime is mainly attributed to the excess metal-to-MoTe2 SB noise and is fully eliminated at the high drain bias regime. This study provides a clear insight into the origin of electronic signal perturbation in 2D electronic systems.

Electrothermal Local Annealing via Graphite Joule Heating on Two-Dimensional Layered Transistors.

A simple but powerful device platform for electrothermal local annealing (ELA) via graphite Joule heating on the surface of transition-metal dichalcogenide, is suggested here to sustainably restore intrinsic electrical properties of atomically thin layered materials. Such two-dimensional materials are easily deteriorated by undesirable surface/interface adsorbates and are screened by a high metal-to-semiconductor contact resistance. The proposed ELA allows one to expect a better electrical performance such as an excess electron doping, an enhanced carrier mobility, and a reduced surface traps in a monolayer molybdenum disulfide (MoS2)/graphite heterostructure. The thermal distribution of local heating measured by an infrared thermal microscope and estimated by a finite element calculation shows that the annealing temperature reaches up to >400 K at ambient condition and the high efficiency of site-specific annealing is demonstrated unlike the case of conventional global thermal annealing. This ELA platform can be further promoted as a practical gas sensor application. From an O2 cycling test and a low-frequency noise spectroscopy, the graphite on top of the MoS2 continuously recovers its initial condition from surface adsorbates. This ELA technique significantly improves the stability and reliability of its gas sensing capability, which can be expanded in various nanoscale device applications.

Suppression of Interfacial Current Fluctuation in MoTe2 Transistors with Different Dielectrics.

For transition metal dichalcogenides, the fluctuation of the channel current due to charged impurities is attributed to a large surface area and a thickness of a few nanometers. To investigate current variance at the interface of transistors, we obtain the low-frequency (LF) noise features of MoTe2 multilayer field-effect transistors with different dielectric environments. The LF noise properties are analyzed using the combined carrier mobility and carrier number fluctuation model which is additionally parametrized with an interfacial Coulomb-scattering parameter (α) that varies as a function of the accumulated carrier density (Nacc) and the location of the active channel layer of MoTe2. Our model shows good agreement with the current power spectral density (PSD) of MoTe2 devices from a low to high current range and indicates that the parameter α exhibits a stronger dependence on Nacc with an exponent -γ of -1.18 to approximately -1.64 for MoTe2 devices, compared with -0.5 for Si devices. The raised Coulomb scattering of the carriers, particularly for a low-current regime, is considered to be caused by the unique traits of layered semiconductors such as interlayer coupling and the charge distribution strongly affected by the device structure under a gate bias, which completely change the charge screening effect in MoTe2 multilayer. Comprehensive static and LF noise analyses of MoTe2 devices with our combined model reveal that a chemical-vapor deposited h-BN monolayer underneath MoTe2 channel and the Al2O3 passivation layer have a dissimilar contribution to the reduction of current fluctuation. The three-fold enhanced carrier mobility due to the h-BN is from the weakened carrier scattering at the gate dielectric interface and the additional 30% increase in carrier mobility by Al2O3 passivation is due to the reduced interface traps.

Voltage Scaling of Graphene Device on SrTiO3 Epitaxial Thin Film.

Electrical transport in monolayer graphene on SrTiO3 (STO) thin film is examined in order to promote gate-voltage scaling using a high-k dielectric material. The atomically flat surface of thin STO layer epitaxially grown on Nb-doped STO single-crystal substrate offers good adhesion between the high-k film and graphene, resulting in nonhysteretic conductance as a function of gate voltage at all temperatures down to 2 K. The two-terminal conductance quantization under magnetic fields corresponding to quantum Hall states survives up to 200 K at a magnetic field of 14 T. In addition, the substantial shift of charge neutrality point in graphene seems to correlate with the temperature-dependent dielectric constant of the STO thin film, and its effective dielectric properties could be deduced from the universality of quantum phenomena in graphene. Our experimental data prove that the operating voltage reduction can be successfully realized due to the underlying high-k STO thin film, without any noticeable degradation of graphene device performance.

Ferroelectric Single-Crystal Gated Graphene/Hexagonal-BN/Ferroelectric Field-Effect Transistor.

The effect of a ferroelectric polarization field on the charge transport in a two-dimensional (2D) material was examined using a graphene monolayer on a hexagonal boron nitride (hBN) field-effect transistor (FET) fabricated using a ferroelectric single-crystal substrate, (1-x)[Pb(Mg1/3Nb2/3)O3]-x[PbTiO3] (PMN-PT). In this configuration, the intrinsic properties of graphene were preserved with the use of an hBN flake, and the influence of the polarization field from PMN-PT could be distinguished. During a wide-range gate-voltage (VG) sweep, a sharp inversion of the spontaneous polarization affected the graphene channel conductance asymmetrically as well as an antihysteretic behavior. Additionally, a transition from antihysteresis to normal ferroelectric hysteresis occurred, depending on the V(G) sweep range relative to the ferroelectric coercive field. We developed a model to interpret the complex coupling among antihysteresis, current saturation, and sudden conductance variation in relation with the ferroelectric switching and the polarization-assisted charge trapping, which can be generalized to explain the combination of 2D structured materials with ferroelectrics.

Quantum Hall conductance of graphene combined with charge-trap memory operation.

The combination of quantum Hall conductance and charge-trap memory operation was qualitatively examined using a graphene field-effect transistor. The characteristics of two terminal quantum Hall conductance appeared clearly on the background of a huge conductance hysteresis during a gate-voltage sweep for a device using monolayer graphene as a channel,hexagonal boron-nitride flakes as a tunneling dielectric and defective silicon oxide as the charge storage node. Even though there was a giant shift of the charge neutrality point, the deviation of quantized resistance value at the state of filling factor 2 was less than 1.6% from half of the von Klitzing constant. At high Landau level indices, the behaviors of quantum conductance oscillation between the increasing and the decreasing electron densities were identical in spite ofa huge memory window exceeding 100 V. Our results indicate that the two physical phenomena, two-terminal quantum Hall conductance and charge-trap memory operation, can be integrated into one device without affecting each other.