Abnormal Threshold Voltage Shifts in P-Channel Low-Temperature Polycrystalline Silicon Thin Film Transistors Under Negative Bias Temperature Stress.
J Nanosci Nanotechnol
; 15(10): 7555-8, 2015 Oct.
Article
em En
| MEDLINE
| ID: mdl-26726370
ABSTRACT
In this research, we have investigated the instability of P-channel low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS TFTs) with double-layer SiO2/SiNx dielectrics. A negative gate bias temperature instability (NBTI) stress was applied and a turn-around behavior phenomenon was observed in the Threshold Voltage Shift (Vth). A positive threshold voltage shift occurs in the first stage, resulting from the negative charge trapping at the SiNx/SiO2 dielectric interface being dominant over the positive charge trapping at dielectric/Poly-Si interface. Following a stress time of 7000 s, the Vth switches to the negative voltage direction, which is "turn-around" behavior. In the second stage, the Vth moves from -1.63 V to -2 V, overwhelming the NBTI effect that results in the trapping of positive charges at the dielectric/Poly-Si interface states and generating grain-boundary trap states and oxide traps.
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01-internacional
Base de dados:
MEDLINE
Idioma:
En
Revista:
J Nanosci Nanotechnol
Ano de publicação:
2015
Tipo de documento:
Article