Immunity to Contact Scaling in MoS2 Transistors Using in Situ Edge Contacts.

Atomically thin two-dimensional (2D) materials are promising candidates for sub-10 nm transistor channels due to their ultrathin body thickness, which results in strong electrostatic gate control. Properly scaling a transistor technology requires reducing both the channel length (distance from source to drain) and the contact length (distance that source and drain interface with semiconducting channel). Contact length scaling remains an unresolved epidemic for transistor scaling, affecting devices from all semiconductors-silicon to 2D materials. Here, we show that clean edge contacts to 2D MoS2 can provide immunity to the contact-scaling problem, with performance that is independent of contact length down to the 20 nm regime. Using a directional ion beam, in situ edge contacts of various metal-MoS2 interfaces are studied. Characterization of the intricate edge interface using cross-sectional electron microscopy reveals distinct morphological effects on the MoS2 depending on its thickness-from monolayer to few-layer films. The in situ edge contacts also exhibit an order of magnitude higher performance compared to the best-reported ex situ metal edge contacts. Our work provides experimental evidence for a solution to contact scaling in transistors, using 2D materials with clean edge contact interfaces, opening a new way of designing devices with 2D materials.

Sustained Sub-60 mV/decade Switching via the Negative Capacitance Effect in MoS2 Transistors.

It has been shown that a ferroelectric material integrated into the gate stack of a transistor can create an effective negative capacitance (NC) that allows the device to overcome "Boltzmann tyranny". While this switching below the thermal limit has been observed with Si-based NC field-effect transistors (NC-FETs), the adaptation to 2D materials would enable a device that is scalable in operating voltage as well as size. In this work, we demonstrate sustained sub-60 mV/dec switching, with a minimum subthreshold swing (SS) of 6.07 mV/dec (average of 8.03 mV/dec over 4 orders of magnitude in drain current), by incorporating hafnium zirconium oxide (HfZrO2 or HZO) ferroelectric into the gate stack of a MoS2 2D-FET. By first fabricating and characterizing metal-ferroelectric-metal capacitors, the MoS2 is able to be transferred directly on top and characterized with both a standard and a negative capacitance gate stack. The 2D NC-FET exhibited marked enhancement in low-voltage switching behavior compared to the 2D-FET on the same MoS2 channel, reducing the SS by 2 orders of magnitude. A maximum internal voltage gain of ∼28× was realized with ∼12 nm thick HZO. Several unique dependencies were observed, including threshold voltage (Vth) shifts in the 2D NC-FET (compared to the 2D-FET) that correlate with source/drain overlap capacitance and changes in HZO (ferroelectric) and HfO2 (dielectric) thicknesses. Remarkable sub-60 mV/dec switching was obtained from 2D NC-FETs of various sizes and gate stack thicknesses, demonstrating great potential for enabling size- and voltage-scalable transistors.

Controllable synthesis and enhanced electrocatalysis of iron-based catalysts derived from electrospun nanofibers.

Electrospun carbon nanofibers containing iron and nitrogen are designed to catalyze the oxygen reduction reaction instead of Pt-based catalysts. Their surface morphology is modified finely by using ultralow oxygen flow, and their onset and half-wave potentials are improved to 0.88 V and 0.76 V versus the reversible hydrogen electrode, respectively, approaching those of Pt-based catalysts.

Uniform and Stable Aerosol Jet Printing of Carbon Nanotube Thin-Film Transistors by Ink Temperature Control.

Semiconducting carbon nanotube (CNT) networks exhibit electrical, mechanical, and chemical properties attractive for thin-film applications, and printing allows for scalable and economically favorable fabrication of CNT thin-film transistors (TFTs). However, device-to-device variation of printed CNT-TFTs remains a concern, which largely stems from variations in printed CNT thin-film morphology and resulting properties. In this work, we overcome the challenges associated with printing uniformity and demonstrate an aerosol jet printing process that yields devices exhibiting a hole mobility of µh = 12.5 cm2/V·s with a relative standard deviation as small as 4% (from over 38 devices). The enabling factors of such high uniformity include control of the CNT ink bath temperature during printing, ink formulation with nonvolatile and viscosifying additives, and a thermal treatment for polymer removal. It is discovered that a low CNT ink temperature benefits aerosol jet printing uniformity and stability in both short-term (∼1 min) and long-term (∼1 h) printing settings. These findings shed light on the effect of a commonly overlooked dimension of CNT aerosol jet printing and provide a practical strategy for large-scale, high-consistency realization of CNT-TFTs.