Low-loss and broadband wafer-scale optical interposers for large-scale heterogeneous integration.

We design, fabricate, and demonstrate a low-loss and broadband optical interposer with high misalignment tolerance for large-scale integration of many chips using thermal compression flip-chip bonding. The optical interposer achieves flip-chip integration with photonic integrated circuit die containing evanescent couplers with inter-chip coupling loss of 0.54dB and ±3.53µm 3-dB misalignment tolerance. The loss measurement spectrum indicated wavelength-insensitive loss across O-band and C-band with negligible spectral dependence. Further, we demonstrate 1 to 100 wafer-scale equal power splitting using equal power splitters (EPS) and a path length matching design fabricated using a wafer-scale fabrication technique.

Uniform emission, constant wavevector silicon grating surface emitter for beam steering with ultra-sharp instantaneous field-of-view.

We report on uniform emission intensity profile, uniform propagation constant silicon gratings for beam steering application with ultra-sharp instantaneous field-of-view (IFOV). To achieve uniform emission intensity across relatively long emission length, we designed a custom grating with varying Si3N4 width and duty cycle while maintaining a uniform propagation constant for relatively narrow divergence emission pattern. We designed and fabricated the custom Si3N4/Si grating with the varying Si3N4 width/duty cycle together with the reference Si3N4/Si grating with a constant 50:50 duty cycle. The custom grating demonstrated the beam steering angle value of 6.6° by sweeping wavelength between 1530 nm and 1575 nm with the emission length over 1 mm. The measured IFOV based on the 3-dB beamwidth values of the far field patterns for the TE polarization are 0.10° and 0.75° for the custom grating and for the reference grating, respectively. The custom grating also indicates mode-selective behavior due to the perturbation of propagation constant for input modes other than TE polarization. The measured TE-mode to TM-mode suppression ratio for the custom grating is approximately 8.2 dB peak-to-peak measured at far field.

Silicon nitride tri-layer vertical Y-junction and 3D couplers with arbitrary splitting ratio for photonic integrated circuits.

We designed and demonstrated a tri-layer Si3N4/SiO2 photonic integrated circuit capable of vertical interlayer coupling with arbitrary splitting ratios. Based on this multilayer photonic integrated circuit platform with each layer thicknesses of 150 nm, 50 nm, and 150 nm, we designed and simulated the vertical Y-junctions and 3D couplers with arbitrary power splitting ratios between 1:10 and 10:1 and with negligible(< -50 dB) reflection. Based on the design, we fabricated and demonstrated tri-layer vertical Y-junctions with the splitting ratios of 1:1 and 3:2 with excess optical losses of 0.230 dB. Further, we fabricated and demonstrated the 1 × 3 3D couplers with the splitting ratio of 1:1:4 for symmetric structures and variable splitting ratio for asymmetric structures.

Rapidly reconfigurable high-fidelity optical arbitrary waveform generation in heterogeneous photonic integrated circuits.

This paper demonstrates rapidly reconfigurable, high-fidelity optical arbitrary waveform generation (OAWG) in a heterogeneous photonic integrated circuit (PIC). The heterogeneous PIC combines advantages of high-speed indium phosphide (InP) modulators and low-loss, high-contrast silicon nitride (Si3N4) arrayed waveguide gratings (AWGs) so that high-fidelity optical waveform syntheses with rapid waveform updates are possible. The generated optical waveforms spanned a 160 GHz spectral bandwidth starting from an optical frequency comb consisting of eight comb lines separated by 20 GHz channel spacing. The Error Vector Magnitude (EVM) values of the generated waveforms were approximately 16.4%. The OAWG module can rapidly and arbitrarily reconfigure waveforms upon every pulse arriving at 2 ns repetition time. The result of this work indicates the feasibility of truly dynamic optical arbitrary waveform generation where the reconfiguration rate or the modulator bandwidth must exceed the channel spacing of the AWG and the optical frequency comb.

Hybrid integration of modified uni-traveling carrier photodiodes on a multi-layer silicon nitride platform using total reflection mirrors.

We demonstrate hybrid integration of modified uni-traveling carrier photodiodes on a multi-layer silicon nitride platform using total reflection mirrors etched by focused ion beam. The hybrid photodetectors show external responsivity of 0.15 A/W and bandwidth of 3.5 GHz for devices with a diameter of 80 µm. The insertion loss of the waveguide is 3 dB and the coupling efficiency of the total reflection mirror is -3 dB. The highest RF output power is -0.5 dBm measured at 3 GHz with 9 mA photocurrent and -9 V bias.

Highly efficient chip-scale III-V/silicon hybrid optical amplifiers.

We discuss the design and demonstration of highly efficient 1.55 µm hybrid III-V/Silicon semiconductor optical amplifiers (SOA). The optimized III-V wafer stack consists of Al(0.10)In(0.71)Ga(0.18)As multiple quantum wells (MQW) and Al(0.48)In(0.52)As electron stop layers to realize SOAs with high wall-plug efficiency (WPE). We present various designs and experimentally determine WPE values for 2 mW and 0.1 mW input power amplification. The 400 µm long flared SOA achieved the highest WPE value of 12.1% for output power > 10mW and the 400 µm long straight SOA achieved the highest WPE value of 7.3% for output power < 10mW. These are the highest WPE values ever obtained for 1.55 µm SOAs.

Low-loss compact multilayer silicon nitride platform for 3D photonic integrated circuits.

We design, fabricate, and demonstrate a silicon nitride (Si(3)N(4)) multilayer platform optimized for low-loss and compact multilayer photonic integrated circuits. The designed platform, with 200 nm thick waveguide core and 700 nm interlayer gap, is compatible for active thermal tuning and applicable to realizing compact photonic devices such as arrayed waveguide gratings (AWGs). We achieve ultra-low loss vertical couplers with 0.01 dB coupling loss, multilayer crossing loss of 0.167 dB at 90° crossing angle, 50 µm bending radius, 100 × 2 µm(2) footprint, lateral misalignment tolerance up to 400 nm, and less than -52 dB interlayer crosstalk at 1550 nm wavelength. Based on the designed platform, we demonstrate a 27 × 32 × 2 multilayer star coupler.

Athermal silicon ring resonators clad with titanium dioxide for 1.3µm wavelength operation.

We investigate the athermal characteristics of silicon waveguides clad with TiO(2) designed for 1.3 µm wavelength operation. Using CMOS-compatible fabrication processes, we realize and experimentally demonstrate silicon photonic ring resonators with resonant wavelengths that vary by less than 6 pm/°C at 1.3 µm. The measured ring resonance wavelengths across the 20-50°C temperature range show nearly complete cancellation of the first-order thermo-optical effects and exhibit second-order thermo-optical effects expected from the combination of TiO(2) and Si.

CMOS-compatible, athermal silicon ring modulators clad with titanium dioxide.

We present the design, fabrication and characterization of athermal nano-photonic silicon ring modulators. The athermalization method employs compensation of the silicon core thermo-optic contribution with that from the amorphous titanium dioxide (a-TiO(2)) overcladding with a negative thermo-optic coefficient. We developed a new CMOS-compatible fabrication process involving low temperature RF magnetron sputtering of high-density and low-loss a-TiO(2) that can withstand subsequent elevated-temperature CMOS processes. Silicon ring resonators with 275 nm wide rib waveguide clad with a-TiO(2) showed near complete athermalization and moderate optical losses. Small-signal testing of the micro-resonator modulators showed high extinction ratio and gigahertz bandwidth.

A simple and scalable graphene patterning method and its application in CdSe nanobelt/graphene Schottky junction solar cells.

We have developed a simple and scalable graphene patterning method using electron-beam or ultraviolet lithography followed by a lift-off process. This method, with the merits of: high pattern resolution and high alignment accuracy, being free from additional etching or harsh processes, being universal to arbitrary substrates, and being compatible to Si microelectronic technology, can easily be applied to diverse graphene-based devices, especially in array-based applications, where large-scale graphene patterns are desired. We have applied this method to fabricate CdSe nanobelt (NB)/graphene Schottky junction solar cells, which have potential applications in integrated nano-optoelectronic systems. A typical as-fabricated solar cell shows excellent photovoltaic behavior, with an open-circuit voltage of ∼0.51 V, a short-circuit current density of ∼5.75 mA cm(-2), and an energy conversion efficiency of ∼1.25%. We attribute the high performance of the cell to the as-patterned high-performance graphene, which can form an ideal Schottky contact with CdSe NB. Our results suggest that both the developed graphene patterning method and the as-fabricated CdSe NB/graphene Schottky junction solar cells have reachable application prospects.