A Monolayer MoS2 FET with an EOT of 1.1 nm Achieved by the Direct Formation of a High-κ Er2 O3 Insulator Through Thermal Evaporation.

Achieving the direct growth of an ultrathin gate insulator with high uniformity and high quality on monolayer transition metal dichalcogenides (TMDCs) remains a challenge due to the chemically inert surface of TMDCs. Although the main solution for this challenge is utilizing buffer layers before oxide is deposited on the atomic layer, this method drastically degrades the total capacitance of the gate stack. In this work, we constructed a novel direct high-κ Er2 O3 deposition system based on thermal evaporation in a differential-pressure-type chamber. A uniform Er2 O3 layer with an equivalent oxide thickness of 1.1 nm was achieved as the gate insulator for top-gated MoS2 field-effect transistors (FETs). The top gate Er2 O3 insulator without the buffer layer on MoS2 exhibited a high dielectric constant that reached 18.0, which is comparable to that of bulk Er2 O3 and is the highest among thin insulators (< 10 nm) on TMDCs to date. Furthermore, the Er2 O3 /MoS2 interface (Dit  ≈ 6 × 1011 cm-2 eV-1 ) is confirmed to be clean and is comparable with that of the h-BN/MoS2 heterostructure. These results prove that high-quality dielectric properties with retained interface quality can be achieved by this novel deposition technique, facilitating the future development of 2D electronics.

Understanding the Memory Window Overestimation of 2D Materials Based Floating Gate Type Memory Devices by Measuring Floating Gate Voltage.

The memory window of floating gate (FG) type non-volatile memory (NVM) devices is a fundamental figure of merit used not only to evaluate the performance, such as retention and endurance, but also to discuss the feasibility of advanced functional memory devices. However, the memory window of 2D materials based NVM devices is historically determined from round sweep transfer curves, while that of conventional Si NVM devices is determined from high and low threshold voltages (Vth s), which are measured by single sweep transfer curves. Here, it is elucidated that the memory window of 2D NVM devices determined from round sweep transfer curves is overestimated compared with that determined from single sweep transfer curves. The floating gate voltage measurement proposed in this study clarifies that the Vth s in round sweep are controlled not only by the number of charges stored in floating gate but also by capacitive coupling between floating gate and back gate. The present finding on the overestimation of memory window enables to appropriately evaluate the potential of 2D NVM devices.

Identifying the Collective Length in VO2 Metal-Insulator Transitions.

The "collective length" in VO2 metal-insulator transitions is identified by controlling nanoscale dopant distribution in thin films. The crossover from the local transition to the collective transition is observed, which originates from the increased instability of the metal-insulator domain boundary. This instability renders the transition collective within the "collective length", which will enable the design of collective electronic devices.

Usefulness of direct-conversion flat-panel detector system as a quality assurance tool for high-dose-rate 192Ir source.

The routine quality assurance (QA) procedure for a high-dose-rate (HDR) 192Ir radioactive source is an important task to provide appropriate brachytherapy. Traditionally, it has been difficult to obtain good quality images using the 192Ir source due to irradiation from the high-energy gamma rays. However, a direct-conversion flat-panel detector (d-FPD) has made it possible to confirm the localization and configuration of the 192Ir source. The purpose of the present study was to evaluate positional and temporal accuracy of the 192Ir source using a d-FPD system, and the usefulness of d-FPD as a QA tool. As a weekly verification of source positional accuracy test, we obtained 192Ir core imaging by single-shot radiography for three different positions (1300/1400/1500 mm) of a check ruler. To acquire images for measurement of the 192Ir source movement distance with varying interval steps (2.5/5.0/10.0 mm) and temporal accuracy, we used the high-speed image acquisition technique and digital subtraction. For accuracy of the 192Ir source dwell time, sequential images were obtained using various dwell times ranging from 0.5 to 30.0 sec, and the acquired number of image frames was assessed. Analysis of the data was performed using the measurement analysis function of the d-FPD system. Although there were slight weekly variations in source positional accuracy, the measured positional errors were less than 1.0 mm. For source temporal accuracy, the temporal errors were less than 1.0%, and the correlation between acquired frames and programmed time showed excellent linearity (R2 = 1). All 192Ir core images were acquired clearly without image halation, and the data were obtained quantitatively. All data were successfully stored in the picture archiving and communication system (PACS) for time-series analysis. The d-FPD is considered useful as the QA tool for the 192Ir source.

Single-Gate MoS2 Tunnel FET with a Thickness-Modulated Homojunction.

Two-dimensional (2D) materials stand as a promising platform for tunnel field-effect transistors (TFETs) in the pursuit of low-power electronics for the Internet of Things era. This promise arises from their dangling bond-free van der Waals heterointerface. Nevertheless, the attainment of high device performance is markedly impeded by the requirement of precise control over the 2D assembly with multiple stacks of different layers. In this study, we addressed a thickness-modulated n/p+-homojunction prepared from Nb-doped p+-MoS2 crystal, where the issue on interface traps can be neglected without any external interface control due to the homojunction. Notably, our observations reveal the existence of a negative differential resistance, even at room temperature (RT). This signifies the successful realization of TFET operation under type III band alignment conditions by a single gate at RT, suggesting that the dominant current mechanism is band-to-band tunneling due to the ideal interface.

Experimental verification of SO2 and S desorption contributing to defect formation in MoS2 by thermal desorption spectroscopy.

The defect-free surface of MoS2 is of high importance for applications in electronic devices. Theoretical calculations have predicted that oxidative etching could be responsible for sulfur vacancy formation. No direct experimental evidence, however, points out the role of adsorbed oxygen on sulfur vacancy formation for MoS2, especially on an insulating SiO2/Si substrate. Herein, by applying thermal desorption spectroscopy, we found that sulfur loss can be tightly coupled to adsorbed oxygen, as confirmed by observation of SO2 desorption. With annealing MoS2, even under ultrahigh vacuum, oxygen molecules adsorbed on MoS2 assist the sulfur atom in dissociating from MoS2, and thus, defects are formed as the result of SO2 desorption from 200 °C to 600 °C. At higher temperatures (over 800 °C), on the other hand, direct sulfur desorption becomes dominant. This finding can be well explained by combining the morphology investigation enabled by atomic layer deposition at defective sites and optical transitions observed by photoluminescence measurements. Moreover, a preannealing treatment prior to exfoliation was found to be an effective method to remove the adsorbed oxygen, thus preventing defect formation.

p-Type Conversion of WS2 and WSe2 by Position-Selective Oxidation Doping and Its Application in Top Gate Transistors.

For the complementary operation of two-dimensional (2D) material-based field-effect transistors (FETs), high-performance p-type FETs are essential. In this study, we applied surface charge-transfer doping from WOx, which has a large work function of ∼6.5 eV, selectively to the access region of WS2 and WSe2 by covering the channel region with h-BN. By reducing the Schottky barrier width at the contact and injecting holes into the valence band, the p-type conversion of intrinsically n-type trilayer WSe2 FET was successfully achieved. However, trilayer WS2 did not show clear p-type conversion because its valence band maximum is 0.66 eV lower than that of trilayer WSe2. Although inorganic WOx boasts high air stability and fabrication process compatibility due to its high thermal budget, the trap sites in WOx cause large hysteresis during back gate operation of WSe2 FETs. However, by using top gate (TG) operation with an h-BN protection layer as a TG insulator, a high-performance p-type WSe2 FET with negligible hysteresis was achieved.

Shift-Current Photovoltaics Based on a Non-Centrosymmetric Phase in In-Plane Ferroelectric SnS.

The shift-current photovoltaics of group-IV monochalcogenides has been predicted to be comparable to those of state-of-the-art Si-based solar cells. However, its exploration has been prevented from the centrosymmetric layer stacking in the thermodynamically stable bulk crystal. Herein, the non-centrosymmetric layer stacking of tin sulfide (SnS) is stabilized in the bottom regions of SnS crystals grown on a van der Waals substrate by physical vapor deposition and the shift current of SnS, by combining the polarization angle dependence and circular photogalvanic effect, is demonstrated. Furthermore, 180° ferroelectric domains in SnS are verified through both piezoresponse force microscopy and shift-current mapping techniques. Based on these results, an atomic model of the ferroelectric domain boundary is proposed. The direct observation of shift current and ferroelectric domains reported herein paves a new path for future studies on shift-current photovoltaics.

Current Injection into Single-Crystalline Carbon-Doped h-BN toward Electronic and Optoelectronic Applications.

The difficulty of current injection into single-crystalline hexagonal boron nitride (h-BN) has long hindered the realization of h-BN-based high-performance electronic and optoelectronic devices. Here, with the contact formed by Ar plasma treatment, Ni/Au metal deposition, and subsequent high-temperature annealing, we demonstrate current injection into single-crystalline h-BN with a C doping level of ∼1.5 × 1019 atoms/cm3. A comparison to the current flow during the dielectric breakdown of h-BN clearly verifies our current injection. The devices show non-Ohmic conduction for all measured temperatures (20-598 K). Analysis of activation energies for carrier transport suggests nearest-neighbor-hopping-assisted Poole-Frenkel (PF) conduction in the highly defective h-BN at the contact region. The estimated dominant defect level with the range of 240-720 meV is much smaller than the Schottky barrier height at the metal/h-BN interface, supporting the effective contact formation for current injection. Moreover, structural and chemical characterizations at the contact suggest that an interaction between Ni and defective h-BN introduces defect states in the gap, assisting the current injection. In contrast, the characterizations confirm the well-retained high crystallinity of h-BN in the channel, indicating the potential of the present contact formation method for the future development of high-performance h-BN-based devices.

Performance Enhancement of SnS/h-BN Heterostructure p-Type FET via the Thermodynamically Predicted Surface Oxide Conversion Method.

Searching for the counterpart of well-developed two-dimensional (2D) n-type field effect transistors (FETs) is indispensable for complementary logic circuit applications for 2D devices. Although SnS is regarded as a potential candidate for high-performance p-type FETs, recent experiments only show poor results deviating from the theoretically predicted high mobility. In this research, the serious performance degradation due to the surface oxidation of SnS, which commonly occurs in most 2D materials, is addressed through surface oxide conversion using highly reactive Ti. In this conversion process, which is confirmed by systematic characterization, the reduction of SnS surface oxide is accompanied by the formation of functional titanium oxide, which works as both a conductive intermediate layer to improve the contact property and a buffer layer of the high-k top gate insulator at the channel region. Consequently, a record-high field effect mobility of 87.4 cm2 V-1 s-1 in SnS p-type FETs is achieved. The surface oxide conversion method applied here is consistent with our previous thermodynamic prediction, and this novel technique can be widely introduced to all 2D materials that are vulnerable to oxidation and facilitate the future development of 2D devices.

Ultrafast Operation of 2D Heterostructured Nonvolatile Memory Devices Provided by the Strong Short-Time Dielectric Breakdown Strength of h-BN.

Recently, the ultrafast operation (∼20 ns) of a two-dimensional (2D) heterostructured nonvolatile memory (NVM) device was demonstrated, attracting considerable attention. However, there is no consensus on its physical origin. In this study, various 2D NVM device structures are compared. First, we reveal that the hole injection at the metal/MoS2 interface is the speed-limiting path in the NVM device with the access region. Therefore, MoS2 NVM devices with a direct tunneling path between source/drain electrodes and the floating gate are fabricated by removing the access region. Indeed, a 50 ns program/erase operation is successfully achieved for devices with metal source/drain electrodes as well as graphite source/drain electrodes. This controlled experiment proves that an atomically sharp interface is not necessary for ultrafast operation, which is contrary to the previous literature. Finally, the dielectric breakdown strength (EBD) of h-BN under short voltage pulses is examined. Since a high dielectric breakdown strength allows a large tunneling current, ultrafast operations can be achieved. Surprisingly, an EBD = 26.1 MV/cm for h-BN is realized under short voltage pulses, largely exceeding the EBD = ∼12 MV/cm from the direct current (DC) measurement. This suggests that the high EBD of h-BN can be the physical origin of the ultrafast operation.

Thermodynamic Perspective on the Oxidation of Layered Materials and Surface Oxide Amelioration in 2D Devices.

Surface oxidation is an unneglectable problem for 2D semiconductors because it hinders the practical application of 2D material-based devices. In this research, the oxidation of layered materials is investigated by a thermodynamic approach to verify their oxidation tendency. It was found that almost all 2D materials are thermodynamically unstable in the presence of oxygen at room temperature. Two potential solutions for surface oxidation are proposed in this work: (i) the conversion of the surface oxides to functional oxides through the deposition of active metals and (ii) the recovery of original 2D materials from the surface oxides by 2D material heterostructure formation with the same chalcogen group. Supported by thermodynamic calculations, both approaches are feasible to ameliorate the surface oxides of 2D materials by the appropriate selection of metals for deposition or 2D materials for heterostructure formation. Thermodynamic data of 64 elements and 75 2D materials are included and compared in this research, which can improve gate insulator or electrode contact material selection in 2D devices to solve the surface oxidation issue. For instance, yttrium and titanium are good candidates for surface oxide conversion, while zirconium and hafnium chalcogenide can trigger the recovery of original 2D materials from their surface oxides. The systematic diagrams presented in this work can serve as a guideline for considering surface oxidation in future device fabrication from various 2D materials.

Material and Device Structure Designs for 2D Memory Devices Based on the Floating Gate Voltage Trajectory.

Two-dimensional heterostructures have been extensively investigated as next-generation nonvolatile memory (NVM) devices. In the past decade, drastic performance improvements and further advanced functionalities have been demonstrated. However, this progress is not sufficiently supported by the understanding of their operations, obscuring the material and device structure design policy. Here, detailed operation mechanisms are elucidated by exploiting the floating gate (FG) voltage measurements. Systematic comparisons of MoTe2, WSe2, and MoS2 channel devices revealed that the tunneling behavior between the channel and FG is controlled by three kinds of current-limiting paths, i.e., tunneling barrier, 2D/metal contact, and p-n junction in the channel. Furthermore, the control experiment indicated that the access region in the device structure is required to achieve 2D channel/FG tunneling by preventing electrode/FG tunneling. The present understanding suggests that the ambipolar 2D-based FG-type NVM device with the access region is suitable for further realizing potentially high electrical reliability.

Purely in-plane ferroelectricity in monolayer SnS at room temperature.

2D van der Waals ferroelectrics have emerged as an attractive building block with immense potential to provide multifunctionality in nanoelectronics. Although several accomplishments have been reported in ferroelectric switching for out-of-plane ferroelectrics down to the monolayer, a purely in-plane ferroelectric has not been experimentally validated at the monolayer thickness. Herein, an in-plane ferroelectricity is demonstrated for micrometer-size monolayer SnS at room temperature. SnS has been commonly regarded to exhibit the odd-even effect, where the centrosymmetry breaks only in the odd-number layers to exhibit ferroelectricity. Remarkably, however, a robust room temperature ferroelectricity exists in SnS below a critical thickness of 15 layers with both an odd and even number of layers, suggesting the possibility of controlling the stacking sequence of multilayer SnS beyond the limit of ferroelectricity in the monolayer. This work will pave the way for nanoscale ferroelectric applications based on SnS as a platform for in-plane ferroelectrics.

Performance evaluation of a direct-conversion flat-panel detector system in imaging and quality assurance for a high-dose-rate 192Ir source.

In high-dose-rate (HDR) brachytherapy, a direct-conversion flat-panel detector (d-FPD) clearly depicts a 192Ir source without image halation, even under the emission of high-energy gamma rays. However, it was unknown why iridium is visible when using a d-FPD. The purpose of this study was to clarify the reasons for visibility of the source core based on physical imaging characteristics, including the modulation transfer functions (MTF), noise power spectral (NPS), contrast transfer functions, and linearity of d-FPD to high-energy gamma rays. The acquired data included: x-rays, [X]; gamma rays, [γ]; dual rays (X + γ), [D], and subtracted data for depicting the source ([D] - [γ]). In the quality assurance (QA) test for the positional accuracy of a source core, the coordinates of each dwelling point were compared between the planned and actual source core positions using a CT/MR-compatible ovoid applicator and a Fletcher-Williamson applicator. The profile curves of [X] and ([D] - [γ]) matched well on MTF and NPS. The contrast resolutions of [D] and [X] were equivalent. A strongly positive linear correlation was found between the output data of [γ] and source strength (r 2 > 0.99). With regard to the accuracy of the source core position, the largest coordinate difference (3D distance) was noted at the maximum curvature of the CT/MR-compatible ovoid and Fletcher-Williamson applicators, showing 1.74 ± 0.02 mm and 1.01 ± 0.01 mm, respectively. A d-FPD system provides high-quality images of a source, even when high-energy gamma rays are emitted to the detector, and positional accuracy tests with clinical applicators are useful in identifying source positions (source movements) within the applicator for QA.

Positive-bias gate-controlled metal-insulator transition in ultrathin VO2 channels with TiO2 gate dielectrics.

The next generation of electronics is likely to incorporate various functional materials, including those exhibiting ferroelectricity, ferromagnetism and metal-insulator transitions. Metal-insulator transitions can be controlled by electron doping, and so incorporating such a material in transistor channels will enable us to significantly modulate transistor current. However, such gate-controlled metal-insulator transitions have been challenging because of the limited number of electrons accumulated by gate dielectrics, or possible electrochemical reaction in ionic liquid gate. Here we achieve a positive-bias gate-controlled metal-insulator transition near the transition temperature. A significant number of electrons were accumulated via a high-permittivity TiO2 gate dielectric with subnanometre equivalent oxide thickness in the inverse-Schottky-gate geometry. An abrupt transition in the VO2 channel is further exploited, leading to a significant current modulation far beyond the capacitive coupling. This solid-state operation enables us to discuss the electrostatic mechanism as well as the collective nature of gate-controlled metal-insulator transitions, paving the pathway for developing functional field effect transistors.