Ultralow-Noise Chopper Amplifier for Seafloor E-Field Measurement.

The seafloor E-field signal is extremely weak and difficult to measured, even with a high signal-to-noise ratio. The preamplifier for electrodes is a key technology for ocean-bottom electromagnetic receivers. In this study, a chopper amplifier was proposed and developed to measure the seafloor E-field signal in the nanovolt to millivolt range at significantly low frequencies. It included a modulator, transformer, AC amplifier, high-impedance (hi-Z) module, demodulator, low-pass filter, and chopper clock generator. The injected charge in complementary metal-oxide semiconductor (CMOS) switches that form the modulator is the main source of 1/f noise. Combined with the principles of peak filtering and dead bands, a hi-Z module was designed to effectively reduce low-frequency noise. The chopper amplifier achieved an ultralow voltage noise of 0.6 nV/rt (Hz) at 1 Hz and 1.2 nV/rt (Hz) at 0.001 Hz. The corner frequency was less than 100 mHz, and there were few 1/f noises in the effective observation frequency band used for detecting electric fields. Each component is described with relevant tradeoffs that realize low noise in the low-frequency range. The amplifier was compact, measuring Ø 68 mm × H 12 mm, and had a low power consumption of approximately 23 mW (two channels). The fixed gain was 1500 with an input voltage range of 2.7 mVPP. The chopper amplifiers demonstrated stable performance in offshore geophysical prospecting applications.

Semiconductor Optical Amplifiers with Wide Gain Bandwidth and Enhanced Polarization Insensitivity Based on Tensile-Strained Quantum Wells.

The paper presents a wide-bandwidth, low-polarization semiconductor optical amplifier (SOA) based on strained quantum wells. By enhancing the material gain of quantum wells for TM modes, we have extended the gain bandwidth of the SOA while reducing its polarization sensitivity. Through a combination of tilted waveguide design and cavity surface optical thin film design, we have effectively reduced the cavity surface reflectance of the SOA, thus decreasing device transmission losses and noise figure. At a wavelength of 1550 nm and a drive current of 1.4 A, the output power can reach 188 mW, with a small signal gain of 36.4 dB and a 3 dB gain bandwidth of 128 nm. The linewidth broadening is only 1.032 times. The polarization-dependent gain of the SOA is below 1.4 dB, and the noise figure is below 5.5 dB. The device employs only I-line lithography technology, offering simple fabrication processes and low costs yet delivering outstanding and stable performance. The designed SOA achieves wide gain bandwidth, high gain, low polarization sensitivity, low linewidth broadening, and low noise, promising significant applications in the wide-bandwidth optical communication field across the S + C + L bands.

A 26-28 GHz, Two-Stage, Low-Noise Amplifier for Fifth-Generation Radio Frequency and Millimeter-Wave Applications.

This paper presents a high-gain low-noise amplifier (LNA) operating at the 5G mm-wave band. The full design combines two conventional cascode stages: common base (CB) and common emitter (CS). The design technique reduces the miller effect and uses low-voltage supply and low-current-density transistors to simultaneously achieve high gain and low noise figures (NFs). The two-stage LNA topology is analyzed and designed using 0.25 µm SiGe BiCMOS process technology from NXP semiconductors. The measured circuit shows a small signal gain at 26 GHz of 26 dB with a gain error below 1 dB on the entire frequency band (26-28 GHz). The measured average NF is 3.84 dB, demonstrated over the full frequency band under 15 mA current consumption per stage, supplied with a voltage of 3.3 V.

Fast Fabrication Nanopores on a PMMA Membrane by a Local High Electric Field Controlled Breakdown.

The sensitivity and accuracy of nanopore sensors are severely hindered by the high noise associated with solid-state nanopores. To mitigate this issue, the deposition of organic polymer materials onto silicon nitride (SiNx) membranes has been effective in obtaining low-noise measurements. Nonetheless, the fabrication of nanopores sub-10 nm on thin polymer membranes remains a significant challenge. This work proposes a method for fabricating nanopores on polymethyl methacrylate (PMMA) membrane by the local high electrical field controlled breakdown, exploring the impact of voltage and current on the breakdown of PMMA membranes and discussing the mechanism underlying the breakdown voltage and current during the formation of nanopores. By improving the electric field application method, transient high electric fields that are one-seven times higher than the breakdown electric field can be utilized to fabricate nanopores. A comparative analysis was performed on the current noise levels of nanopores in PMMA-SiNx composite membranes and SiNx nanopores with a 5 nm diameter. The results demonstrated that the fast fabrication of nanopores on PMMA-SiNx membranes exhibited reduced current noise compared to SiNx nanopores. This finding provides evidence supporting the feasibility of utilizing this technology for efficiently fabricating low-noise nanopores on polymer composite membranes.

A gm/ID-Based Low-Power LNA for Ka-Band Applications.

This article presents the design of a low-power low noise amplifier (LNA) implemented in 45 nm silicon-on-insulator (SOI) technology using the gm/ID methodology. The Ka-band LNA achieves a very low power consumption of only 1.98 mW andis the first time the gm/ID approach is applied at such a high frequency. The circuit is suitable for Ka-band applications with a central frequency of 28 GHz, as the circuit is intended to operate in the n257 frequency band defined by the 3GPP 5G new radio (NR) specification. The proposed cascode LNA uses the gm/ID methodology in an RF/MW scenario to exploit the advantages of moderate inversion region operation. The circuit occupies a total area of 1.23 mm2 excluding pads and draws 1.98 mW from a DC supply of 0.9 V. Post-layout simulation results reveal a total gain of 11.4 dB, a noise figure (NF) of 3.8 dB, and an input return loss (IRL) better than 12 dB. Compared to conventional circuits, this design obtains a remarkable figure of merit (FoM) as the LNA reports a gain and NF in line with other approaches with very low power consumption.

Differential BroadBand (1-16 GHz) MMIC GaAs mHEMT Low-Noise Amplifier for Radio Astronomy Applications and Sensing.

A broadband differential-MMIC low-noise amplifier (DLNA) using metamorphic high-electron-mobility transistors of 70 nm in Gallium Arsenide (70 nm GaAs mHEMT technology) is presented. The design and results of the performance measurements of the DLNA in the frequency band from 1 to 16 GHz are shown, with a high dynamic range, and a noise figure (NF) below 1.3 dB is obtained. In this work, two low-noise amplifiers (LNAs) were designed and manufactured in the OMMIC foundry: a dual LNA, which we call balanced, and a differential LNA, which we call DLNA. However, the paper focuses primarily on DLNA because of its differential architecture. Both use a 70 nm GaAs mHEMT space-qualified technology with a cutoff frequency of 300 GHz. With a low power bias Vbias/Ibias (5 V/40.5 mA), NF < 1.07 dB "on wafer" was achieved, from 2 to 16 GHz; while with the measurements made "on jig", NF = 1.1 dB, from 1 to 10 GHz. Furthermore, it was obtained that NF < 1.5 dB, from 1 to 16 GHz, with a figure of merit equal to 145.5 GHz/mW. Finally, with the proposed topology, several LNAs were designed and manufactured, both in the OMMIC process and in other foundries with other processes, such as UMS. The experimental results showed that the NF of the DLNA MMIC with multioctave bandwidth that was built in the frequency range of the L-, S-, C-, and X-bands was satisfactory.

Low-Noise Amplifier with Bypass for 5G New Radio Frequency n77 Band and n79 Band in Radio Frequency Silicon on Insulator Complementary Metal-Oxide Semiconductor Technology.

This paper presents the design of a low-noise amplifier (LNA) with a bypass mode for the n77/79 bands in 5G New Radio (NR). The proposed LNA integrates internal matching networks for both input and output, combining two LNAs for the n77 and n79 bands into a single chip. Additionally, a bypass mode is integrated to accommodate the flexible operation of the receiving system in response to varying input signal levels. For each frequency band, we designed a low-noise amplifier for the n77 band to expand the bandwidth to 900 MHz (3.3 GHz to 4.2 GHz) using resistive-capacitance (RC) feedback and series inductive-peaking techniques. For the n79 band, only the RC feedback technique was employed to optimize the performance of the LNA for its 600 MHz bandwidth (4.4 GHz to 5.0 GHz). Because wideband techniques can lead to a trade-off between gain and noise, causing potential degradation in noise performance, appropriate bandwidth design becomes crucial. The designed n77 band low-noise amplifier achieved a simulated gain of 22.6 dB and a noise figure of 1.7 dB. Similarly, the n79 band exhibited a gain of 21.1 dB and a noise figure of 1.5 dB with a current consumption of 10 mA at a 1.2 supply voltage. The bypass mode was designed with S21 of -3.7 dB and -5.0 dB for n77 and n79, respectively.

A Low-Noise Amplifier for Submarine Electric Field Signal Based on Chopping Amplification Technology.

In the exploration of ocean resources, the submarine electric field signal plays a crucial role through marine electromagnetic methods. However, due to the field signal's low-frequency and weak characteristics, it often encounters interference from the instrument's own 1/f noise during its acquisition. To address this issue, we developed a low-noise amplifier for the submarine electric field signal based on chopping amplification technology. This amplifier utilizes low-temperature electronic components to adapt to the cold submarine environment and enhances its independence by incorporating a square wave generator. Additionally, we conducted simulations and experimental tests on the designed chopper amplifier circuit, evaluating the equivalent input voltage noise spectrum (EIVNS) and the frequency response within 1 mHz~100 Hz. The experimental results indicate that the amplifier designed in this study achieves sufficiently low noise 2 nV/√Hz@1 mHz, effectively amplifying the submarine electric field signal measured with the electric field sensor.

Miniaturized MR-compatible ultrasound system for real-time monitoring of acoustic effects in mice using high-resolution MRI.

Visualization of focused ultrasound in high spatial and temporal resolution is crucial for accurately and precisely targeting brain regions noninvasively. Magnetic resonance imaging (MRI) is the most widely used noninvasive tool for whole-brain imaging. However, focused ultrasound studies employing high-resolution (> 9.4 T) MRI in small animals are limited by the small size of the radiofrequency (RF) volume coil and the noise sensitivity of the image to external systems such as bulky ultrasound transducers. This technical note reports a miniaturized ultrasound transducer system packaged directly above a mouse brain for monitoring ultrasound-induced effects using high-resolution 9.4 T MRI. Our miniaturized system integrates MR-compatible materials with electromagnetic (EM) noise reduction techniques to demonstrate echo-planar imaging (EPI) signal changes in the mouse brain at various ultrasound acoustic intensities. The proposed ultrasound-MRI system will enable extensive research in the expanding field of ultrasound therapeutics.

Over One Million DNA and Protein Events Through Ultra-Stable Chemically-Tuned Solid-State Nanopores.

Stability, long lifetime, resilience against clogging, low noise, and low cost are five critical cornerstones of solid-state nanopore technology. Here, a fabrication protocol is described wherein >1 million events are obtained from a single solid-state nanopore with both DNA and protein at the highest available lowpass filter (LPF, 100 kHz) of the Axopatch 200B-the highest event count mentioned in literature. Moreover, a total of ≈8.1 million events are reported in this work encompassing the two analyte classes. With the 100 kHz LPF, the temporally attenuated population is negligible while with the more ubiquitous 10 kHz, ≈91% of the events are attenuated. With DNA experiments, the pores are operational for hours (typically >7 h) while the average pore growth is merely ≈0.16 ± 0.1 nm h-1 . The current noise is exceptionally stable with traces typically showing <10 pA h-1 increase in noise. Furthermore, a real-time method to clean and revive pores clogged with analyte with the added benefit of minimal pore growth during cleaning (< 5% of the original diameter) is showcased. The enormity of the data collected herein presents a significant advancement to solid-state pore performance and will be useful for future ventures such as machine learning where large amounts of pristine data are a prerequisite.

Design and Characterization of a Burst Mode 20 Mfps Low Noise CMOS Image Sensor.

This paper presents a novel ultra-high speed, high conversion-gain, low noise CMOS image sensor (CIS) based on charge-sweep transfer gates implemented in a standard 180 nm CIS process. Through the optimization of the photodiode geometry and the utilization of charge-sweep transfer gates, the proposed pixels achieve a charge transfer time of less than 10 ns without requiring any process modifications. Moreover, the gate structure significantly reduces the floating diffusion capacitance, resulting in an increased conversion gain of 183 µV/e-. This advancement enables the image sensor to achieve the lowest reported noise of 5.1 e- rms. To demonstrate the effectiveness of both optimizations, a proof-of-concept CMOS image sensor is designed, taped-out and characterized.

Artificial Neural Network Modeling of a CMOS Differential Low-Noise Amplifier Using the Bayesian Regularization Algorithm.

The purpose of this communication is to present the modeling of an Artificial Neural Network (ANN) for a differential Complementary Metal Oxide Semiconductor (CMOS) Low-Noise Amplifier (LNA) designed for wireless applications. For satellite transponder applications employing differential LNAs, various techniques, such as gain boosting, linearity improvement, and body bias, have been individually documented in the literature. The proposed LNA combines all three of these techniques differentially, aiming to achieve a high gain, a low noise figure, excellent linearity, and reduced power consumption. Under simulation conditions at 5 GHz using Cadence, the proposed LNA demonstrates a high gain (S21) of 29.5 dB and a low noise figure (NF) of 1.2 dB, with a reduced supply voltage of only 0.9 V. Additionally, it exhibits a reflection coefficient (S11) of less than -10 dB, a power dissipation (Pdc) of 19.3 mW, and a third-order input intercept point (IIP3) of 0.2 dBm. The performance results of the proposed LNA, combining all three techniques, outperform those of LNAs employing only two of the above techniques. The proposed LNA is modeled using PatternNet BR, and the simulation results closely align with the results of the developed ANN. In comparison to the Cadence simulation method, the proposed approach also offers accurate circuit solutions.

Wideband SiGe-HBT Low-Noise Amplifier with Resistive Feedback and Shunt Peaking.

In this work, the design of a wideband low-noise amplifier (LNA) using a resistive feedback network is proposed for potential multi-band sensing, communication, and radar applications. For achieving wide operational bandwidth and flat in-band characteristics simultaneously, the proposed LNA employs a variety of circuit design techniques, including a voltage-current (shunt-shunt) negative feedback configuration, inductive emitter degeneration, a main branch with an added cascode stage, and the shunt-peaking technique. The use of a feedback network and emitter degeneration provides broadened transfer characteristics for multi-octave coverage and a real impedance for input matching, respectively. In addition, the cascode stage pushes the band-limiting low-frequency pole, due to the Miller capacitance, to a higher frequency. Lastly, the shunt-peaking approach is optimized for the compensation of a gain reduction at higher frequency bands. The wideband LNA proposed in this study is fabricated using a commercial 0.13 µm silicon-germanium (SiGe) BiCMOS process, employing SiGe heterojunction bipolar transistors (HBTs) as the circuit's core active elements in the main branch. The measurement results show an operational bandwidth of 2.0-29.2 GHz, a noise figure of 4.16 dB (below 26.5 GHz, which was the measurement limit), and a total power consumption of 23.1 mW under a supply voltage of 3.3 V. Regarding the nonlinearity associated with large-signal behavior, the proposed LNA exhibits an input 1-dB compression (IP1dB) point of -5.42 dBm at 12 GHz. These performance numbers confirm the strong viability of the proposed approach in comparison with other state-of-the-art designs.

A Review of High-Power Semiconductor Optical Amplifiers in the 1550 nm Band.

The 1550 nm band semiconductor optical amplifier (SOA) has great potential for applications such as optical communication. Its wide-gain bandwidth is helpful in expanding the bandwidth resources of optical communication, thereby increasing total capacity transmitted over the fiber. Its relatively low cost and ease of integration also make it a high-performance amplifier of choice for LiDAR applications. In recent years, with the rapid development of quantum-well (QW) material systems, SOAs have gradually overcome the shortcomings of polarization sensitivity and high noise. The research on quantum-dot (QD) materials has further improved the noise characteristics and transmission loss of SOAs. The design of special waveguide structures-such as plate-coupled optical waveguide amplifiers and tapered amplifiers-has also increased the saturation output power of SOAs. The maximum gain of the SOA has been reported to be more than 21 dB. The maximum saturation output power has been reported to be more than 34.7 dBm. The maximum 3 dB gain bandwidth has been reported to be more than 120 nm, the lowest noise figure has been reported to be less than 4 dB, and the lowest polarization-dependent gain has been reported to be 0.1 dB. This study focuses on the improvement and enhancement of the main performance parameters of high-power SOAs in the 1550 nm band and introduces the performance parameters, the research progress of high-power SOAs in the 1550 nm band, and the development and application status of SOAs. Finally, the development trends and prospects of high-power SOAs in the 1550 nm band are summarized.

High-Power-Efficiency Readout Circuit Employing Average Capacitance-to-Voltage Converter for Micro-Electro-Mechanical System Capacitive Accelerometers.

A capacitance-to-voltage converter (CVC) is proposed in this paper and applied to a readout circuit for a micro-electro-mechanical system (MEMS) accelerometer to improve the power efficiency. In a traditional readout circuit, the front-end CVC has to operate at a high sampling frequency to resist thermal noise deterioration due to the large parasitic capacitance introduced by the mechanical sensing element. Thus, the back-end analog-to-digital converter (ADC) also has to operate at a high sampling frequency to avoid noise aliasing when sampling the output signal of the CVC, which leads to high power consumption. The average CVC technique is proposed in this paper to reduce the sampling frequency requirement of the back-end ADC and thus reduce the power consumption. Both the traditional readout circuit and the proposed readout circuit are simulated with a commercial 0.18 µm BCD process. The simulation results show that noise aliasing occurs, and the noise power spectral density (PSD) of the traditional readout circuit increases by 12 dB when the sampling frequency of back-end ADC is reduced by 24 dB. However, in the proposed readout circuit, a noise aliasing effect does not occur. Moreover, the proposed readout circuit reduces the power consumption by 53% without thermal noise deterioration. In addition, the proposed CVC circuits are fabricated in an 0.18 µm BCD process, and the test results show that the presented readout circuit based on the average CVC technique can obtain better performance than the traditional CVC-based readout circuit.

A 2-V 1.4-dB NF GaAs MMIC LNA for K-Band Applications.

A 1.4-dB Noise Figure (NF) four-stage K-band Monolithic Microwave Integrated Circuit (MMIC) Low-Noise Amplifier (LNA) in UMS 100 nm GaAs pHEMT technology is presented. The proposed circuit is designed to cover the 5G New Release n258 frequency band (24.25-27.58 GHz). Momentum EM post-layout simulations reveal the circuit achieves a minimum NF of 1.3 dB, a maximum gain of 34 dB, |S11| better than -10 dB from 23 GHz to 29 GHz, a P1dB of -18 dBm and an OIP3 of 24.5 dBm. The LNA draws a total current of 59.1 mA from a 2 V DC supply and results in a chip size of 3300 × 1800 µm2 including pads. We present a design methodology focused on the selection of the active device size and DC bias conditions to obtain the lowest NF when source degeneration is applied. The design procedure ensures a minimum NF design by selecting a device which facilitates a simple input matching network implementation and obtains a reasonable input return loss thanks to the application of source degeneration. With this approach the input matching network is implemented with a shunt stub and a transmission line, therefore minimizing the contribution to the NF achieved by the first stage. Comparisons with similar works demonstrate the developed circuit is very competitive with most of the state-of-the-art solutions.

X-band MMICs for a Low-Cost Radar Transmit/Receive Module in 250 nm GaN HEMT Technology.

This paper describes Monolithic Microwave Integrated Circuits (MMICs) for an X-band radar transceiver front-end implemented in 0.25 µm GaN High Electron Mobility Transistor (HEMT) technology. Two versions of single pole double throw (SPDT) T/R switches are introduced to realize a fully GaN-based transmit/receive module (TRM), each of which achieves an insertion loss of 1.21 dB and 0.66 dB at 9 GHz, IP1dB higher than 46.3 dBm and 44.7 dBm, respectively. Therefore, it can substitute a lossy circulator and limiter used for a conventional GaAs receiver. A driving amplifier (DA), a high-power amplifier (HPA), and a robust low-noise amplifier (LNA) are also designed and verified for a low-cost X-band transmit-receive module (TRM). For the transmitting path, the implemented DA achieves a saturated output power (Psat) of 38.0 dBm and output 1-dB compression (OP1dB) of 25.84 dBm. The HPA reaches a Psat of 43.0 dBm and power-added efficiency (PAE) of 35.6%. For the receiving path, the fabricated LNA measures a small-signal gain of 34.9 dB and a noise figure of 2.56 dB, and it can endure higher than 38 dBm input power in the measurement. The presented GaN MMICs can be useful in implementing a cost-effective TRM for Active Electronically Scanned Array (AESA) radar systems at X-band.

RF-SOI Low-Noise Amplifier Using RC Feedback and Series Inductive-Peaking Techniques for 5G New Radio Application.

This paper presents a low-noise amplifier (LNA) with an integrated input and output matching network designed using RF-SOI technology. This LNA was designed with a resistive feedback topology and an inductive peaking technology to provide 600 MHz of bandwidth in the N79 band (4.4 GHz to 5.0 GHz). Generally, the resistive feedback structure used in broadband applications allows the input and output impedance to be made to satisfy the broadband conditions through low-impedance feedback. However, feedback impedance for excessive broadband characteristics can degrade the noise performance as a consequence. To achieve a better noise performance for a bandwidth of 600 MHz, the paper provided an optimized noise performance by selecting the feedback resistor value optimized for the N79 band. Additionally, an inductive peaking technique was applied to the designed low-noise amplifier to achieve a better optimized output matching network. The designed low-noise amplifier simulated a gain of 20.68 dB and 19.94 dB from 4.4 to 5.0 GHz, with noise figures of 1.57 dB and 1.73 dB, respectively. The input and output matching networks were also integrated, and the power consumption was designed to be 9.95 mA at a supply voltage of 1.2 V.

An MMIC LNA for Millimeter-Wave Radar and 5G Applications with GaN-on-SiC Technology.

This paper presents a monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) that is compatible with n257 (26.5-29.5 GHz) and n258 (24.25-27.5 GHz) frequency bands for fifth-generation mobile communications system (5G) and millimeter-wave radar. The total circuit size of the LNA is 2.5 × 1.5 mm2. To guarantee a trade-off between noise figure (NF) and small signal gain, the transmission lines are connected to the source of gallium nitride (GaN)-on-SiC high electron mobility transistors (HEMT) by analyzing the nonlinear small signal equivalent circuit. A series of stability enhancement measures including source degeneration, an RC series network, and RF choke are put forward to enhance the stability of designed LNA. The designed GaN-based MMIC LNA adopts hybrid-matching networks (MNs) with co-design strategy to realize low NF and broadband characteristics across 5G n257 and n258 frequency band. Due to the different priorities of these hybrid-MNs, distinguished design strategies are employed to benefit small signal gain, input-output return loss, and NF performance. In order to meet the testing conditions of MMIC, an impeccable system for measuring small has been built to ensure the accuracy of the measured results. According to the measured results for small signal, the three-stage MMIC LNA has a linear gain of 18.2-20.3 dB and an NF of 2.5-3.1 dB with an input-output return loss better than 10 dB in the whole n257 and n258 frequency bands.

A 316MP, 120FPS, High Dynamic Range CMOS Image Sensor for Next Generation Immersive Displays.

We present a 2D-stitched, 316MP, 120FPS, high dynamic range CMOS image sensor with 92 CML output ports operating at a cumulative date rate of 515 Gbit/s. The total die size is 9.92 cm × 8.31 cm and the chip is fabricated in a 65 nm, 4 metal BSI process with an overall power consumption of 23 W. A 4.3 µm dual-gain pixel has a high and low conversion gain full well of 6600e- and 41,000e-, respectively, with a total high gain temporal noise of 1.8e- achieving a composite dynamic range of 87 dB.