Detecting defects that reduce breakdown voltage using machine learning and optical profilometry.

Semiconductor wafer manufacturing relies on the precise control of various performance metrics to ensure the quality and reliability of integrated circuits. In particular, GaN has properties that are advantageous for high voltage and high frequency power devices; however, defects in the substrate growth and manufacturing are preventing vertical devices from performing optimally. This paper explores the application of machine learning techniques utilizing data obtained from optical profilometry as input variables to predict the probability of a wafer meeting performance metrics, specifically the breakdown voltage (Vbk). By incorporating machine learning techniques, it is possible to reliably predict performance metrics that cause devices to fail at low voltage. For diodes that fail at a higher (but still below theoretical) breakdown voltage, alternative inspection methods or a combination of several experimental techniques may be necessary.

Using machine learning with optical profilometry for GaN wafer screening.

To improve the manufacturing process of GaN wafers, inexpensive wafer screening techniques are required to both provide feedback to the manufacturing process and prevent fabrication on low quality or defective wafers, thus reducing costs resulting from wasted processing effort. Many of the wafer scale characterization techniques-including optical profilometry-produce difficult to interpret results, while models using classical programming techniques require laborious translation of the human-generated data interpretation methodology. Alternatively, machine learning techniques are effective at producing such models if sufficient data is available. For this research project, we fabricated over 6000 vertical PiN GaN diodes across 10 wafers. Using low resolution wafer scale optical profilometry data taken before fabrication, we successfully trained four different machine learning models. All models predict device pass and fail with 70-75% accuracy, and the wafer yield can be predicted within 15% error on the majority of wafers.

Optimizing performance and yield of vertical GaN diodes using wafer scale optical techniques.

To improve the manufacturing of vertical GaN devices for power electronics applications, the effects of defects in GaN substrates need to be better understood. Many non-destructive techniques including photoluminescence, Raman spectroscopy and optical profilometry, can be used to detect defects in the substrate and epitaxial layers. Raman spectroscopy was used to identify points of high crystal stress and non-uniform conductivity in a substrate, while optical profilometry was used to identify bumps and pits in a substrate which could cause catastrophic device failures. The effect of the defects was studied using vertical P-i-N diodes with a single zone junction termination extention (JTE) edge termination and isolation, which were formed via nitrogen implantation. Diodes were fabricated on and off of sample abnormalities to study their effects. From electrical measurements, it was discovered that the devices could consistently block voltages over 1000 V (near the theoretical value of the epitaxial layer design), and the forward bias behavior could consistently produce on-resistance below 2 mΩ cm2, which is an excellent value considering DC biasing was used and no substrate thinning was performed. It was found that high crystal stress increased the probability of device failure from 6 to 20%, while an inhomogeneous carrier concentration had little effect on reverse bias behavior, and slightly (~ 3%) increased the on-resistance (Ron). Optical profilometry was able to detect regions of high surface roughness, bumps, and pits; in which, the majority of the defects detected were benign. However a large bump in the termination region of the JTE or a deep pit can induce a low voltage catastrophic failure, and increased crystal stress detected by the Raman correlated to the optical profilometry with associated surface topography.

Ultrafast Self-Assembly of Sub-10 nm Block Copolymer Nanostructures by Solvent-Free High-Temperature Laser Annealing.

Laser spike annealing was applied to PS-b-PDMS diblock copolymers to induce short-time (millisecond time scale), high-temperature (300 to 700 °C) microphase segregation and directed self-assembly of sub-10 nm features. Conditions were identified that enabled uniform microphase separation in the time frame of tens of milliseconds. Microphase ordering improved with increased temperature and annealing time, whereas phase separation contrast was lost for very short annealing times at high temperature. PMMA brush underlayers aided ordering under otherwise identical laser annealing conditions. Good long-range order for sub-10 nm cylinder morphology was achieved using graphoepitaxy coupled with a 20 ms dwell laser spike anneal above 440 °C.

Lateral Temperature-Gradient Method for High-Throughput Characterization of Material Processing by Millisecond Laser Annealing.

A high-throughput method for characterizing the temperature dependence of material properties following microsecond to millisecond thermal annealing, exploiting the temperature gradients created by a lateral gradient laser spike anneal (lgLSA), is presented. Laser scans generate spatial thermal gradients of up to 5 °C/µm with peak temperatures ranging from ambient to in excess of 1400 °C, limited only by laser power and materials thermal limits. Discrete spatial property measurements across the temperature gradient are then equivalent to independent measurements after varying temperature anneals. Accurate temperature calibrations, essential to quantitative analysis, are critical and methods for both peak temperature and spatial/temporal temperature profile characterization are presented. These include absolute temperature calibrations based on melting and thermal decomposition, and time-resolved profiles measured using platinum thermistors. A variety of spatially resolved measurement probes, ranging from point-like continuous profiling to large area sampling, are discussed. Examples from annealing of III-V semiconductors, CdSe quantum dots, low-κ dielectrics, and block copolymers are included to demonstrate the flexibility, high throughput, and precision of this technique.

µ-Rainbow: CdSe Nanocrystal Photoluminescence Gradients via Laser Spike Annealing for Kinetic Investigations and Tunable Device Design.

Much of the promise of nanomaterials derives from their size-dependent, and hence tunable, properties. Impressive advances have been made in the synthesis of nanoscale building blocks with precisely tailored size, shape and composition. Significant attention is now turning toward creating thin film structures in which size-dependent properties can be spatially programmed with high fidelity. Nonequilibrium processing techniques present exciting opportunities to create nanostructured thin films with unprecedented spatial control over their optical and electronic properties. Here, we demonstrate single scan laser spike annealing (ssLSA) on CdSe nanocrystal (NC) thin films as an experimental test bed to illustrate how the size-dependent photoluminescence (PL) emission can be tuned throughout the visible range and in spatially defined profiles during a single annealing step. Through control of the annealing temperature and time, we discovered that NC fusion is a kinetically limited process with a constant activation energy in over 2 orders of magnitude of NC growth rate. To underscore the broader technological implications of this work, we demonstrate the scalability of LSA to process large area NC films with periodically modulated PL emission, resulting in tunable emission properties of a large area film. New insights into the processing-structure-property relationships presented here offer significant advances in our fundamental understanding of kinetics of nanomaterials as well as technological implications for the production of nanomaterial films.