Porous materials as effective chemiresistive gas sensors.

Chemiresistive gas sensors (CGSs) have revolutionized the field of gas sensing by providing a low-power, low-cost, and highly sensitive means of detecting harmful gases. This technology works by measuring changes in the conductivity of materials when they interact with a testing gas. While semiconducting metal oxides and two-dimensional (2D) materials have been used for CGSs, they suffer from poor selectivity to specific analytes in the presence of interfering gases and require high operating temperatures, resulting in high signal-to-noise ratios. However, nanoporous materials have emerged as a promising alternative for CGSs due to their high specific surface area, unsaturated metal actives, and density of three-dimensional inter-connected conductive and pendant functional groups. Porous materials have demonstrated excellent response and recovery times, remarkable selectivity, and the ability to detect gases at extremely low concentrations. Herein, our central emphasis is on all aspects of CGSs, with a primary focus on the use of porous materials. Further, we discuss the basic sensing mechanisms and parameters, different types of popular sensing materials, and the critical explanations of various mechanisms involved throughout the sensing process. We have provided examples of remarkable performance demonstrated by sensors using these materials. In addition to this, we compare the performance of porous materials with traditional metal-oxide semiconductors (MOSs) and 2D materials. Finally, we discussed future aspects, shortcomings, and scope for improvement in sensing performance, including the use of metal-organic frameworks (MOFs), covalent-organic frameworks (COFs), and porous organic polymers (POPs), as well as their hybrid counterparts. Overall, CGSs using porous materials have the potential to address a wide range of applications, including monitoring water quality, detecting harmful chemicals, improving surveillance, preventing natural disasters, and improving healthcare.

Effects of thermal annealing on analog resistive switching behavior in bilayer HfO2/ZnO synaptic devices: the role of ZnO grain boundaries.

The effects of thermal annealing on analog resistive switching behavior in bilayer HfO2/ZnO synaptic devices were investigated. The annealed active ZnO layer between the top Pd electrode and the HfO2 layer exhibited electroforming-free resistive switching. In particular, the switching uniformity, stability, and reliability of the synaptic devices were dramatically improved via thermal annealing at 600 °C atomic force microscopy and X-ray diffraction analyses revealed that active ZnO films demonstrated increased grain size upon annealing from 400 °C to 700 °C, whereas the ZnO film thickness and the annealing of the HfO2 layer in bilayer HfO2/ZnO synaptic devices did not profoundly affect the analog switching behavior. The optimized thermal annealing at 600 °C in bilayer HfO2/ZnO synaptic devices dramatically improved the nonlinearity of long-term potentiation/depression properties, the relative coefficient of variation of the asymmetry distribution σ/µ, and the asymmetry ratio, which approached 1. The results offer valuable insights into the implementation of highly robust synaptic devices in neural networks.

Performance enhancement of HfO2-based resistive random-access memory devices using ZnO nanoparticles.

In this study, resistive random-access memory (ReRAM) devices with ZnO nanoparticles (NPs) are suggested to enhance performance and reduce variation in device switching parameters. The ZnO NPs are formed by annealing ZnO prepared via atomic layer deposition on HfO2, which is verified using transmission electron microscopy, x-ray diffraction pattern, and atomic force microscopy. The depth profile analysis of x-ray photoelectron spectroscopy shows that oxygen diffuses from HfO2to ZnO NPs during annealing. This can be explained by the calculation results using density functional theory (DFT) where the formation energy of oxygen vacancies is reduced at the interface of ZnO NPs and HfO2compared to single HfO2. The fabricated ZnO NPs ReRAM demonstrates reduced forming voltage, stable resistive switching behavior, and improved cycle-to-cycle uniformity in a high-resistance state.

ZnWO4 nanorod-colloidal SnO2 quantum dots core@shell heterostructures: Efficient solar-light-driven photocatalytic degradation of tetracycline.

Zinc tungsten oxide (ZW) and colloidal SnO2 quantum dots (CS) were synthesized individually by hydrothermal and wet chemical methods. ZW-CS core@shell nanorods were prepared using a sonochemical method for the enhanced photocatalytic activity of tetracycline (TC) degradation. ZW-CS core@shell nanorods were systematically characterized by structural, morphological mapping and optical techniques. All characterization techniques were synchronized to confirm the construction of core@shell nanorods. Optical absorption studies indicate an increased light-capturing efficiency along with a reduced bandgap from 3.56 to 3.23 eV, which is further supported by photoluminescence. Mapping analysis from SEM and HR-TEM evidence the presence of elements as well as a core@shell nanostructure. The optimized sample of ZW-CS 1.0 shows improved photocatalytic degradation of TC under stimulated solar light. The TC degradation efficiency by ZW-CS 1.0 core@shell nanorods was about 97% within 2 h. The formation of core@shell nanorod structure might be the reason for the better photocatalytic tetracycline degradation performance.

Effect of high-pressure D2 and H2 annealing on LFN properties in FD-SOI pTFET.

Tunneling field-effect transistors (TFETs) are a promising candidate for the next generation of low-power devices, but their performance is very sensitive to traps near the tunneling junction. This study investigated the effects of high-pressure deuterium (D2) annealing and hydrogen (H2) annealing on the electrical performance and low-frequency noise (LFN) of a fully depleted silicon-on-insulator p-type TFET. Without high-pressure annealing, the typical noise power spectral density exhibited two Lorentzian spectra that were affected by fast and slow trap sites. With high-pressure annealing, the interface trap density related to fast trap sites was reduced. The passivation of traps near the tunneling junction indicates that high-pressure H2 and D2 annealing improves the electrical performance and LFN properties, and it may become a significant and necessary step for realizing integrated TFET technology in the future.

Bottom-Gated ZnO TFT Pressure Sensor with 1D Nanorods.

In this study, a bottom-gated ZnO thin film transistor (TFT) pressure sensor with nanorods (NRs) is suggested. The NRs are formed on a planar channel of the TFT by hydrothermal synthesis for the mediators of pressure amplification. The fabricated devices show enhanced sensitivity by 16~20 times better than that of the thin film structure because NRs have a small pressure transmission area and causes more strain in the underlayered piezoelectric channel material. When making a sensor with a three-terminal structure, the leakage current in stand-by mode and optimal conductance state for pressure sensor is expected to be controlled by the gate voltage. A scanning electron microscope (SEM) was used to identify the nanorods grown by hydrothermal synthesis. X-ray diffraction (XRD) was used to compare ZnO crystallinity according to device structure and process conditions. To investigate the effect of NRs, channel mobility is also extracted experimentally and the lateral flow of current density is analyzed with simulation (COMSOL) showing that when the piezopotential due to polarization is formed vertically in the channel, the effective mobility is degraded.

IGZO-decorated ZnO thin films and their application for gas sensing.

In this study, indium-gallium-zinc oxide (IGZO)-decorated ZnO thin films were investigated through the change in IGZO deposition time for the detection of NO2 gas. The atomic layer deposited ZnO on interdigitated Au electrode alumina substrates are decorated with IGZO by controlling the deposition time. The IGZO (ZnO:Ga2O3:In2O3 = 1:1:1 mol. %) polycrystalline target was used for deposition and effect of deposition time was investigated. The sensor responses (Rgas/Rair) of 20.6, 39.3, and 57.1 and 45.2, 102.5, and 243.5 were obtained at 150 °C, 200 °C, and 250 °C and 25-ppm NO2 concentration for ZnO (Z1) and IGZO-decorated ZnO (Z3) films, respectively. The sensor response (Rgas/Rair) increased from ∼27 to 243.5 by decorating the ZnO film with IGZO for a 60-s sputtering time. The sensor recovery and response times of the IGZO-decorated ZnO/ZnO sensor increased, and the sensor selectivity to different gases was also evaluated.

Zinc oxide and indium-gallium-zinc-oxide bi-layer synaptic device with highly linear long-term potentiation and depression characteristics.

The electrical properties, resistive switching behavior, and long-term potentiation/depression (LTP/LTD) in a single indium-gallium-zinc-oxide (IGZO) and bi-layer IGZO/ZnO (ZnO: zinc oxide) memristors were investigated for synapse application. The use of the oxide bi-layer memristors, in particular, improved electrical properties such as stability, memristor reliability, and an increase in synaptic weight states. The set voltage of bi-layer IGZO/ZnO memristors was 0.9 V, and the reset voltage was around - 0.7 V, resulting in a low-operating voltage for neuromorphic systems. The oxygen vacancies in the X-ray photoelectron spectroscopy analysis played a role in the modulation of the high-resistance state (HRS) (oxygen-deficient) and the low-resistance state (oxygen-rich) region. The VRESET of the bi-layer IGZO/ZnO memristors was lower than that of a single IGZO, which implied that oxygen-vacancy filaments could be easily ruptured due to the higher oxygen vacancy peak HRS layer. The nonlinearity of the LTP and LTD characteristics in a bi-layer IGZO/ZnO memristor was 6.77% and 11.49%, respectively, compared to those of 20.03% and 51.1% in a single IGZO memristor, respectively. Therefore, the extra ZnO layer in the bi-layer memristor with IGZO was potentially significant and essential to achieve a small set voltage and a reset voltage, and the switching behavior to form the conductive path.

High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications.

In this study, the deuterium passivation effect of silicon nitride (Si3N4) on data retention characteristics is investigated in a Metal-Nitride-Oxide-Silicon (MNOS) memory device. To focus on trap passivation in Si3N4 as a charge trapping layer, deuterium (D2) high pressure annealing (HPA) was applied after Si3N4 deposition. Flat band voltage shifts (ΔVFB) in data retention mode were compared by CV measurement after D2 HPA, which shows that the memory window decreases but charge loss in retention mode after program is suppressed. Trap energy distribution based on thermal activated retention model is extracted to compare the trap density of Si3N4. D2 HPA reduces the amount of trap densities in the band gap range of 1.06-1.18 eV. SIMS profiles are used to analyze the D2 profile in Si3N4. The results show that deuterium diffuses into the Si3N4 and exists up to the Si3N4-SiO2 interface region during post-annealing process, which seems to lower the trap density and improve the memory reliability.

Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory.

In this study, polycrystalline silicon (poly-Si) is applied to silicon-oxide-nitride-oxide-silicon (SONOS) flash memory as a channel material and the physical and electrical characteristics are analyzed. The results show that the surface roughness of silicon nitride as charge trapping layer (CTL) is enlarged with the number of interface traps and the data retention properties are deteriorated in the device with underlying poly-Si channel which can be serious problem in gate-last 3D NAND flash memory architecture. To improve the memory performance, high pressure deuterium (D2) annealing is suggested as a low-temperature process and the program window and threshold voltage shift in data retention mode is compared before and after the D2 annealing. The suggested curing is found to be effective in improving the device reliability.

Fluorine-implanted indium-gallium-zinc oxide (IGZO) chemiresistor sensor for high-response NO2 detection.

Gas sensors fabricated using In-Ga-Zn oxide (IGZO) thin films doped with Fluorine (F) were used to detect nitrogen dioxide (NO2) gas. IGZO films with a thickness of 250 nm were deposited onto SiO2/Si substrates via radio-frequency magnetron sputtering, followed by F-doping by an ion-implantation procedure with implant energy of 45 keV and a dose of 3 × 1015 ions/cm2. The NO2 gas detection performance of the fabricated thin-film sensors was tested at various temperatures and NO2 concentrations. The F-doped IGZO (F-IGZO) sensor showed high NO2 gas sensitivity: the ratio between the responses to NO2 and air (Rgas/Rair) was 590 at 250 °C and 100 ppm NO2 gas concentration. F-IGZO sensor showed superior selectivity toward NO2 over other gases. The stability of the sensor was also investigated; the sensor was observed to exhibit stable performance for 2 weeks.

Effective Schottky barrier lowering of NiGe/p-Ge(100) using Terbium interlayer structure for high performance p-type MOSFETs.

Ultra-low contact resistance at the interface between NiGe and p-Ge, i.e., NiGe/p-Ge was achieved by introducing terbium (Tb) as an interlayer in forming NiGe using Tb/Ni/TiN structure. The contact resistance value obtained using the circular transmission line model for an 8-nm thick Tb interlayer sample was 7.21 × 10-8 Ω·cm2, which is two orders of magnitude less than that of reference sample (without the Tb interlayer) of 7.36 × 10-6 Ω·cm2. The current-voltage characteristics were studied at a temperature range of -110 ~ 25 °C to determine the effective Schottky barrier height (eSBH). An eSBH of 0.016 eV was obtained for the 8-nm thick Tb interlayer. Various Tb interlayer thicknesses were selected to study their effect on the contact resistance. The Tb interlayer surface and structural properties were characterized using FESEM, XRD, XPS, TEM, and SIMS analyses.

Temperature Dependence of Low Frequency Noise in Silicon on Insulator Tunneling Field Effect Transistor.

In this work, noise mechanism of a tunneling field-effect transistor (TFET) on a silicon-on-insulator substrate was studied as a function of temperature. The results show that the drain current and subthreshold slope increase with increase in temperature. This temperature dependence is likely caused by the generation of greater current flow owing to decreased silicon band gap and leakage. Further, the TFET noise decreases with increase in temperature. Therefore, the effective tunneling length between the source and the channel appears to decrease and Poole-Frenkel tunneling occurs.

Improved Sensitivity in Schottky Contacted Two-Dimensional MoS2 Gas Sensor.

Two-dimensional (2D) transition-metal dichalcogenides have attracted significant attention as gas-sensing materials owing to their superior responsivity at room temperature and their possible application as flexible electronic devices. Especially, reliable responsivity and selectivity for various environmentally harmful gases are the main requirements for the future chemiresistive-type gas sensor applications. In this study, we demonstrate improved sensitivity of a 2D MoS2-based gas sensor by controlling the Schottky barrier height. Chemical vapor deposition process was performed at low temperature to obtain layer-controlled 2D MoS2, and the NO2 gas responsivity was confirmed by the fabricated gas sensor. Then, the number of MoS2 layers was fixed and the types of electrode materials were varied for controlling the Schottky barrier height. As the Schottky barrier height increased, the NO2 responsivity increased, and it was found to be effective for CO and CO2 gases, which had little reactivity in 2D MoS2-based gas sensors.

Investigation of Intra-Nitride Charge Migration Suppression in SONOS Flash Memory.

In order to suppress the intra-nitride charge spreading in 3D Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) flash memory where the charge trapping layer silicon nitride is shared along the cell string, N2 plasma treated on the silicon nitride is proposed. Experimental results show that the charge loss decreased in the plasma treated device after baking at 300 °C for 2 h. To extract trap density according to the location in the trapping layer, capacitance-voltage analysis was used and N2 plasma treatment was shown to be effective to restrain the interface trap formation between blocking oxide and silicon nitride. Moreover, from X-ray Photoelectron Spectroscopy, the reduction of Si-O-N bonding was observed.

Gate Voltage Dependence of Low Frequency Noise in Tunneling Field Effect Transistors.

In this paper, the dependency of low frequency noise as a function of the gate voltage was examined for tunneling field effect transistors (TFETs). When the level of gate voltage is low, the tunneling width of the TFETs is large. Thus, electrons move via the trap instead of tunneling directly. On the other hand, when the level of gate voltage is high, the tunneling width of the TFETs becomes narrow. Thus, when the gate voltage is low, the noise level of TFETs is high because electrons pass through the trap. However, when the gate voltage is high, electrons pass directly from valence band of source to conduction band of drain, so the noise level is low. Finding the voltage suitable for this TFET is important to determine the optimum conditions for generating BTBT when measuring TFETs and to reduce noise.

Investigation of Positive Bias Temperature Instability Characteristics of Fully Depleted Silicon on Insulator Tunneling Field Effect Transistor with High-k Dielectric Gate Stacks.

The positive bias temperature instability (PBTI) characteristics of fully depleted silicon on insulator (FD-SOI) tunneling field effect transistor (TFET) are investigated in comparison with those of metal oxide semiconductor field effect transistor (MOSFET) fabricated with the same technology process. Unlike some of the previously reported studies, in which the PBTI lifetime of TFET is much longer than that of MOSFET, in this study, the PBTI lifetime of TFET is found to be shorter than that of MOSFET. This result is very interesting, because degradation of electrical parameters of TFET is mainly affected by local traps near the source junction rather than global traps in the channel region. Large degradation of the electrical parameters of TFET due to PBTI stress would result from large fluctuation of the vertical electric field caused by traps near the source junction. This electric field fluctuation near the local region in TFET has more impact on electrical parameter degradation than channel conductivity fluctuation in MOSFET. Therefore, to improve the reliability characteristics of TFET, evaluation of PBTI characteristics and improvement of the quality of gate oxide near the source junction are essential.

Additive effect of poly(4-vinylphenol) gate dielectric in organic thin film transistor at low temperature process.

We fabricated pentacene-based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics. The solution of gate dielectrics is prepared by adding methylated poly[melamine-co-formaldehyde] (MMF) and photo-initiator (PI) [1-phenyl-2-hydroxy-2-methylpropane-1-one, Darocur1173@Ciba] to PVP By using a small amount (2.4 wt%) of PI, the cross-linking temperature is lowered to 90 degrees C, which is lower than general thermal curing reaction temperature for the cross-linked PVP (> 180 degrees C). The hysteresis and the leakage current of the OTFTs are also decreased by adding the MMF and PI in the PVP gate dielectric.

The effect of thermal annealing on pentacene thin film transistor with micro contact printing.

We used micro contact printing (micro-CP) to fabricate inverted coplanar pentacene thin film transistors (TFTs) with 1-microm channels. The patterning of micro-scale source/drain electrodes without etch process was successfully achieved using Polydimethylsiloxane (PDMS) elastomer stamp. We used the Ag nano particle ink as an electrode material, and the sheet resistance and surface roughness of the Ag electrodes were effectively reduced with the 2-step thermal annealing on a hotplate, which improved the mobility, the on-off ratio, and the subthreshold slope (SS) of the pentacene TFTs. In addition, the device annealing on a hotplate in a N2 atmosphere for 30 sec can enhance the off-current and the mobility properties of OTFTs without damaging the pentacene thin films and increase the adhesion between pentacene and dielectric layer (SiO2), which was investigated with the pentacene films phase change of the XRD spectrum after device annealing.

Novel palladium germanide schottky contact for high performance schottky barrier ge MOSFETs and characterization of its leakage current mechanism.

The leakage current mechanism of Palladium (Pd) germanide Schottky contact on n-type Ge-on-Si substrate is analyzed in depth. The electric field dependent analysis shows that the dominant leakage current mechanism is the Poole-Frenkel emission due to the existence of deep level traps in the depletion region of the Pd germanide/n-type Ge Schottky diode. The analysis of the dependence of leakage current on temperature also shows that the Poole-Frenkel emission and generation current are the dominant components below 100 degrees C and that the Schottky emission related to thermionic emission of majority carriers over a potential barrier is the main cause of this dominance at high temperature region.