Reliability Improvement in Solution-Processed ZrO2 Dielectrics Due to Addition of H2O2.

In this study, we investigated the effects of hydrogen peroxide (H2O2) on solution-processed zirconium oxide (ZrO2) dielectric materials. The addition of H2O2 into ZrO2 dielectric showed a reduction in hysteresis capacitance-voltage characteristics (from 393 mV to 96 mV). This resulted in a reduction in border trap density (Nbt) of the ZrO2 film (ZrO2: 2.24 × 1011 cm-2, ZrO2 + H2O2: 3.96 × 1010 cm-2). In addition, use of H2O2 in the ZrO2 dielectric improved the interface quality. Specifically, the reduced number of trap sites improved the reliability of the device under a negative bias stress (NBS). The 350 °C annealed ZrO2 dielectric with H2O2 showed excellent leakage current properties (6.7 × 10-9 A/cm2 at gate voltage of -10 V). Based on these results, we fabricated IGZO/ZrO2 + H2O2 TFTs, which showed a high saturation mobility of 6.10 cm2/V · s and excellent switching properties. This study suggests that incorporation of H2O2 into ZrO2 effectively reduced oxygen vacancies through strong oxidation and minimized residual organics that cause impurities or structural defects, such as pores or pin holes, compared to a virgin ZrO2 film.

Incorporation of Si and Zr into Pure HfO2 and Its Effects on Dielectric Integrity.

Hafnium-silicate (HfSiO4, (HfO2)x(SiO2)1-x) and hafnium-zirconate (HfZrO4, (HfO2)x(ZrO2)1-x) films were employed as a gate dielectric to enhance the electrical properties of pure HfO2. (HfO2)x(SiO2)1-x and (HfO2)x(ZrO2)1-x films were formed onto p-Si substrates with varying degrees of Hf content x (x = 1, 0.9, 0.7, and 0.5) via solution processing. With regard to (HfO2)x(SiO2)1-x, the leakage current decreased from 1.94 × 10-8 to 4.29 × 10-9 A/cm2 at a gate voltage of VG = -1 V when the HfO2 content was reduced. These resulted from the reduction of leakage paths through the interface between HfSiO4 and Si substrate. Additionally, (HfO2)x(ZrO2)1-x exhibited the lowest interfacial trap density of 3.4 × 1011 cm-2 eV-1 for x = 0.5 due to a reduction in root mean square (RMS) roughness of the film from 6.0 to 4.2 nm. From the results, it was found that (HfO2)0.5(SiO2)0.5 demonstrated excellent oxide integrity in contact with Si substrates, whereas (HfO2)0.5(ZrO2)0.5 demonstrated an enhanced film morphology and maintained a high dielectric constant value. Finally, the HfZrO4/HfSiO4/Si structure revealed a gate oxide with enhanced integrity compared to pure HfO2-based devices.

Investigation of the Charge Balance in Green Phosphorescent Organic Light-Emitting Diodes by Controlling the Mixed Host Emission Layer.

In this paper, we investigated the use of a mixed host emission layer (MH-EML) in green phosphorescent organic light-emitting diodes (OLEDs). The hole transport type (p-type) material (4,4'-Bis(N-carbazolyl)-1,1'-biphenyl (CBP)) and electron transport type (N-type) material (2,2',2″-(1,3,5-Benzinetriyl)-tris(1-phenyl-1-H-benzimidazole) (TPBi)) were mixed with different ratios. The electrons were easily injected through the lowest unoccupied molecular orbital (LUMO) of TPBi in the mixed host system. Also, holes were confined in the EML because of the deep highest occupied molecular orbital (HOMO) level of TPBi (6.7 eV). These results indicate that excitons were formed effectively and the recombination zone became wider under a high electric field in MH-EML devices. For these reasons, the lifetime of the MH-OLED device was 1.36 times higher than that of a single host emission layer (SH-EML) device and showed a reduction in Joule heating. Finally, the external quantum efficiency (EQE) roll-off ratio from 1 mA/cm2 to 100 mA/cm2 in the optimized device (30.46%) was 18.12%p lower than that of the SH-EML (48.58%).

Optimization of the Solution-Based Indium-Zinc Oxide/Zinc-Tin Oxide Channel Layer for Thin-Film Transistors.

Double stacked indium-zinc oxide (IZO)/zinc-tin oxide (ZTO) active layers were employed in amorphous-oxide-semiconductor thin-film transistors (AOS TFTs). Channel layers of the TFTs were optimized by varying the molarity of ZTO back channel layers (0.05, 0.1, 0.2, 0.3 M) and the electrical properties of IZO/ZTO double stacked TFTs were compared to single IZO and ZTO TFTs with varying the molarity and molar ratio. On the basis of the results, IZO/ZTO (0.1 M) TFTs showed the excellent electrical properties of saturation mobility (13.6 cm2/V·s), on-off ratio (7×106), and subthreshold swing (0.223 V/decade) compared to ZTO (0.1 M) of 0.73 cm2/V · s, 1 × 107, 0.416 V/decade and IZO (0.04 M) of 0.10 cm2/V · s, 5 × 106, 0.60 V/decade, respectively. This may be attributed to diffusing Sn into front layer during annealing process. In addition, with varying molarity of ZTO back channel layer, from 0.1 M to 0.3 M ZTO back channel TFTs, electrical properties and positive bias stability deteriorated with increasing molarity of back channel layer because of increasing total trap states. On the other hand, 0.05 M ZTO back channel TFT had inferior electrical properties than that of 0.1 M ZTO back channel TFT. It was related to back channel effect because of having thin thickness of channel layer. Among these devices, 0.1 M ZTO back channel TFT had a lowest total trap density, outstanding electrical properties and stability. Therefore, we recommended IZO/ZTO (0.1 M) TFT as a promising channel structure for advanced display applications.

Electrical Characterization of Charge Polarity in AlF3 Anti-Reflection Layers for Complementary Metal Oxide Semiconductor Image Sensors.

In this study, the charge polarity of aluminum fluoride (AlF3) as a function of varying thickness (tAlF3 = 20, 35, 50, 65, and 80 nm) was discussed. AlF3 films were deposited onto p-Si wafers via electron beam sputtering. Thickness dependent charge polarity and reliability issues under bias-temperature stress conditions were identified using a capacitance-voltage (C-V) characterization method. AlF3 was found to possess negative fixed charges, leading to a C-V curve shift toward the positive gate bias direction as tAlF3 was increased up to 50 nm. On the contrary, the C-V characteristics were dominantly affected by the positive charges of mobile ions and/or fluorine vacancies when tAlF3 was increased to more than 50 nm. Additionally, negative bias temperature stress (1 MV/cm, 473 K for 10 mins) increased insulator trapped charges and decreased interface traps in 20 nm thick AlF3 films. These results could be attributed to positively charged fluorine vacancies introduced by broken Al-F bonds within AlF3 films and the passivation of Si dangling bonds due to broken fluorine ions at the interface, respectively. It was believed that 20 nm thick AlF3 films sufficiently attracted holes from the Si substrate, forming a hole accumulation layer on the surface due to total charge polarity of the AlF3 dielectric being entirely governed by negative fixed charges as the thickness of AlF3 decreased. Based on these results, AlF3 films are proposed for use as an anti-reflection layer to replace HfO2 in CMOS image sensors.

Performance degradation of c-Si solar cells under UV exposure.

Current-Voltage (I-V) and Capacitance-Voltage (C-V) characteristics of crystalline silicon solar cells were obtained under UV exposure. The solar cell parameters degraded with increasing exposure time. For example, open-circuit voltage (V(oc)), short-circuit current (J(sc)), fill-factor (FF) and efficiency (eta) were degraded. In this study, solar cell did not degrade at the p-n junction or silicon substrate effective lifetime by UltraViolet (UV) light exposure. The main degradation occurred at the SiN(x) layer, the commonly used anti-reflection coating (ARC), due to the positive charges generated by the high-energy UV light source. UV light changed the characteristics of the SiN(x) layer and the Si/SiN(x) interface to degrade the cell efficiency.

Negative Bias Instability of InZnO-Based Thin-Film Transistors Under Illumination Stress.

In this study, we investigated the threshold voltage (Vth) instability of solution-processed indium zinc oxide (IZO) thin film transistors (TFTs) prior to and after negative bias illumination stress (NBIS) with varying carrier suppressors (Ga, Al, Hf, and Zr). Variations in electrical properties of the IZO-based TFTs as a function of carrier suppressors were attributed to the differences in metal-oxygen bonding energy of the materials, which was numerically verified by calculating the relative oxygen deficient ratio from the X-ray photoelectron spectroscopy analysis. Furthermore, the values of Vth shift (ΔVth) of the devices subjected to negative gate bias stress under 635 nm (red), 530 nm (green), and 480 nm (blue) wavelength light irradiation increased as the incident photon energy increased. IZO TFTs doped with Ga atoms demonstrated weaker metal-oxygen bonding energy compared to the others and exhibited the largest ΔVth. This result was attributed to the suppressor-dependent distribution of neutral oxygen vacancies which determine the degrees of photon energy absorption in the IZO films. Then, the ΔVth instability of IZO-based TFTs under NBIS correlated well with a stretched exponential function.

Leakage Current Analysis Method for Metal Insulator Semiconductor Capacitors Through Low-Frequency Noise Measurement.

Use of thinner oxides to improve the operating speed of a complementary metal-oxidesemiconductor (CMOS) device causes serious gate leakage problems. Leakage current of the dielectric analysis method has I-V, C-V, and charge pumping, but the procedure is very complicated. In this premier work, we analyzed the leakage current of metal insulator semiconductor (MIS) capacitors with different initiators through low-frequency noise (LFN) measurement with simplicity and high sensitivity. The LFN measurement results show a correlation between power spectral density (SIG) and gate leakage current (IG). MIS capacitors of hafnium zirconium silicate (HZS, (HfZrO4)1-x (SiO2)x) were used for the experiments with varying SiO2 ratio (x = 0, 0.1, 0.2) of hafnium zirconium oxide (HZO, HfZrO4). As the SiO2 ratio increased, the leakage current decreased according to J-V measurement. Further, the C-V measurement confirmed that the oxide-trapped charge (Not) increased with increasing SiO2 ratio. Finally, the LFN measurement method revealed that the cause of leakage current reduction was trap density reduction of the insulator.

Effects of polyimide curing on image sticking behaviors of flexible displays.

Flexible displays on a polyimide (PI) substrate are widely regarded as a promising next-generation display technology due to their versatility in various applications. Among other bendable materials used as display panel substrates, PI is especially suitable for flexible displays for its high glass transition temperature and low coefficient of thermal expansion. PI cured under various temperatures (260 °C, 360 °C, and 460 °C) was implemented in metal-insulator-metal (MIM) capacitors, amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFT), and actual display panels to analyze device stability and panel product characteristics. Through electrical analysis of the MIM capacitor, it was confirmed that the charging effect in the PI substrates intensified as the PI curing temperature increased. The threshold voltage shift (ΔVth) of the samples was found to increase with rising curing temperature under negative bias temperature stress (NBTS) due to the charging effect. Our analyses also show that increasing ΔVth exacerbates the image sticking phenomenon observed in display panels. These findings ultimately present a direct correlation between the curing temperature of polyimide substrates and the panel image sticking phenomenon, which could provide an insight into the improvement of future PI-substrate-based displays.

Hydrogen Permeation and Its Impacts on the Electrical Performance of Stacked ZrO2/Al2O3/ZrO2 Films.

In this study, the effects of hydrogenation on the dielectric capacitance and leakage current of ZrO2/Al2O3/ZrO2 (ZAZ) films for dynamic-random-access memory (DRAM) capacitors were examined. Hydrogen permeation into ZAZ films reduced the dielectric capacitance and increased the leakage current with continued exposure to hydrogen during the forming gas annealing process. More specifically, the hydrogen ions distributed in the grain boundaries and at the Z/A interfaces appeared to disrupt the dipole motion and diminish the dielectric constant of the film, resulting in a decreased dielectric capacitance. Furthermore, the reaction of hydrogen atoms with the pre-existing oxygen of the ZrO2 films resulted in an oxygen vacancy with two captured electrons. Conduction electrons freed via ionization of the oxygen vacancy increased the conductivity of the ZAZ films, thereby increasing the leakage current throughout the ZAZ films.

Solution-Based Indium-Zinc Oxide/Indium-Gallium-Zinc Oxide Double-Channel Thin-Film Transistors with Incorporated Hydrogen Peroxide.

We fabricated and evaluated solution-based double-channel thin-film transistors (TFTs) that consisted of an indium-zinc oxide (IZO) front layer and an indium-gallium-zinc oxide (IGZO) back channel with the addition of hydrogen peroxide (H2O2). The devices showed superior electrical properties with regard to saturation mobility (12.9 cm2/V·s), the on-off ratio (5 × 107), and the subthreshold swing (0.21 V/decade). All the devices were subjected under bias and illumination stress for reliability assessment. The threshold voltage shift stability of positive and negative bias illumination stress under different wavelengths was also enhanced. Thus, we achieved improved performance using IZO/IGZO TFTs with back channels that incorporated H2O2.

Hafnium Incorporation in InZnO Thin Film Transistors as a Carrier Suppressor.

In this study, we fabricated Hf-doped indium zinc oxide thin-film transistors (HIZO TFTs) using a solution process. Channel layers of the TFTs were optimized by varying the molar ratio of Hf in the channel layers. The electrical properties of the fabricated devices were compared to gallium indium zinc oxide (GIZO). HIZO TFTs showed 0.12 V threshold voltage, 0.45 V/decade subthreshold swing and 1.24 × 106 on-off current ratio, which were excellent compared to that of GIZO. In particular, when a positive gate bias stress of 10 V was applied for 10³ s, the HIZO TFT exhibited a lower threshold voltage shift of 1.11 V than the GIZO TFT (1.88 V). These results originate from the higher oxygen bonding with Hf in IZO compared to Ga atoms. We confirmed that Hf acts as an excellent carrier suppressor whose properties exceed those of Ga.

Defect Analysis and Reliability Characteristics of (HfZrO4)1-x(SiO2)x High-κ Dielectrics.

Hafnium zirconium silicon oxide ((HfZrO4)1-x(SiO2)x) materials were investigated through the defect analysis and reliability characterization for next generation high-κ dielectric. Silicate doped hafnium zirconium oxide (HfZrO4) films showed a reduction of negative flat-band voltage (Vfb) shift compared to pure HfZrO4. This result was caused by a decrease in donor-like interface traps (Dit) and positive border traps (Nbt). As the silicon oxide (SiO2) content increased, the Vfb was shifted in the positive direction from -1.23 to -1.10 to -0.91 V and the slope of the capacitance-voltage (C-V) curve increased. The nonparallel shift of the C-V characteristics was affected by the Dit, while the Nbt was responsible for the parallel C-V curve shift. The values of Dit reduced from 4.3 × 1011, 3.5 × 1011, and 3.0 × 1011 cm-2eV-1, as well as the values of Nbt were decreased from 5.24, 3.90 to 2.26 × 1012 cm-2. Finally, reduction of defects in the HfZrO4-base film with an addition of SiO2 affected the gate oxide reliability characteristics, such as gate leakage current (JG), bias temperature stress instability (BTSI), and time dependent gate dielectric breakdown (TDDB).

Effect of Heat Budget After Capacitor Formation on the Leakage Current Characteristics of ZrO2-Based High-k Dielectrics for Next-Generation Dynamic Random-Access Memory Capacitors.

Successful development of 20 nm or smaller dynamic random-access memory (DRAM) requires reduction of the leakage current in capacitors with high-k dielectrics. To reduce the leakage current of the capacitor, we fabricated a ZrO2-based metal-insulator-metal (MIM) capacitor and investigated changes in leakage current characteristics associated with heat budget following capacitor formation. Leakage current characteristics were drastically degraded by applying an additional heat treatment to the MIM capacitor. Through detailed analysis of leakage versus bias voltage (I-V) characteristics, dielectric constants, and high-resolution transmission electron microscopy (HR-TEM) findings, we determined that the leakage current degradation was caused by an increase in Poole-Frenkel (P-F) emission due to an increase in defect density in the dielectrics and an increase in the dielectric constant due to enhancement of the crystallinity of ZrO2. Based on the experimental results, we propose a new, simple strategy to reduce leakage current without changing the capacitor structure or material used in the DRAM manufacturing process. This simple approach will not only enable mass production of 20 nm DRAM, but also contribute to the development of next-generation DRAMs by reducing the leakage current of the capacitor.

Analysis of the Electrical Properties of an Electron Injection Layer in Alq3-Based Organic Light Emitting Diodes.

We investigated the carrier transfer and luminescence characteristics of organic light emitting diodes (OLEDs) with structure ITO/HAT-CN/NPB/Alq3/Al, ITO/HAT-CN/NPB/Alq3/Liq/Al, and ITO/HAT-CN/NPB/Alq3/LiF/A. The performance of the OLED device is improved by inserting an electron injection layer (EIL), which induces lowering of the electron injection barrier. We also investigated the electrical transport behaviors of p-Si/Alq3/Al, p-Si/Alq3/Liq/Al, and p-Si/Alq3/LiF/Al Schottky diodes, by using current-voltage (L-V) and capacitance-voltage (C-V) characterization methods. The parameters of diode quality factor n and barrier height φ(b) were dependent on the interlayer materials between Alq3 and Al. The barrier heights φ(b) were 0.59, 0.49, and 0.45 eV, respectively, and the diode quality factors n were 1.34, 1.31, and 1.30, respectively, obtained from the I-V characteristics. The built in potentials V(bi) were 0.41, 0.42, and 0.42 eV, respectively, obtained from the C-V characteristics. In this experiment, Liq and LiF thin film layers improved the carrier transport behaviors by increasing electron injection from Al to Alq3, and the LiF schottky diode showed better I-V performance than the Liq schottky diode. We confirmed that a Liq or LiF thin film inter-layer governs electron and hole transport at the Al/Alq3 interface, and has an important role in determining the electrical properties of OLED devices.

Fabrication and Characteristics of High Mobility InSnZnO Thin Film Transistors.

In this paper, we describe the fabrication of thin film transistors (TFTs) with amorphous indium-tin-zinc-oxide (ITZO) as the active material. A transparent ITZO channel layer was formed under an optimized oxygen partial pressure (OPP (%) = O2/(Ar + O2)) and subsequent annealing process. The electrical properties exhibited by this device include field-effect mobility (µ(eff)), sub-threshold swing (SS), and on/off current ratio (I(ON/OFF)) values of 28.97 cm2/V x s, 0.2 V/decade, and 2.64 x 10(7), respectively. The average transmittance values for each OPP condition in the visible range were greater than 80%. The positive gate bias stress resulted in a positive threshold voltage (V(th)) shift in the transfer curves and degraded the parameters µ(eff) and SS. These phenomena originated from electron trapping from the ITZO channel layer into the oxide/ITZO interface trap sites.

Trap Profiling Based on Frequency Varied Charge Pumping Method for Hot Carrier Stressed Thin Gate Oxide Metal Oxide Semiconductors Field Effect Transistors.

In this study, pulse frequency and reverse bias voltage is modified in charge pumping and advanced technique is presented to extract oxide trap profile in hot carrier stressed thin gate oxide metal oxide semiconductor field effect transistors (MOSFETs). Carrier trapping-detrapping in a gate oxide was analyzed after hot carrier stress and the relationship between trapping depth and frequency was investigated. Hot carrier induced interface traps appears in whole channel area but induced border traps mainly appears in above pinch-off region near drain and gradually decreases toward center of the channel. Thus, hot carrier stress causes interface trap generation in whole channel area while most border trap generation occurs in the drain region under the gate. Ultimately, modified charge pumping method was performed to get trap density distribution of hot carrier stressed MOSFET devices, and the trapping-detrapping mechanism is also analyzed.

Defect visualization of Cu(InGa)(SeS)2 thin films using DLTS measurement.

Defect depth profiles of Cu (In1-x,Gax)(Se1-ySy)2 (CIGSS) were measured as functions of pulse width and voltage via deep-level transient spectroscopy (DLTS). Four defects were observed, i.e., electron traps of ~0.2 eV at 140 K (E1 trap) and 0.47 eV at 300 K (E2 trap) and hole traps of ~0.1 eV at 100 K (H1 trap) and ~0.4 eV at 250 K (H2 trap). The open circuit voltage (VOC) deteriorated when the trap densities of E2 were increased. The energy band diagrams of CIGSS were also obtained using Auger electron spectroscopy (AES), X-ray photoelectron spectroscopy (XPS), and DLTS data. These results showed that the valence band was lowered at higher S content. In addition, it was found that the E2 defect influenced the VOC and could be interpreted as an extended defect. Defect depth profile images provided clear insight into the identification of defect state and density as a function of depth around the space charge region.