Thousands of conductance levels in memristors integrated on CMOS.

Neural networks based on memristive devices1-3 have the ability to improve throughput and energy efficiency for machine learning4,5 and artificial intelligence6, especially in edge applications7-21. Because training a neural network model from scratch is costly in terms of hardware resources, time and energy, it is impractical to do it individually on billions of memristive neural networks distributed at the edge. A practical approach would be to download the synaptic weights obtained from the cloud training and program them directly into memristors for the commercialization of edge applications. Some post-tuning in memristor conductance could be done afterwards or during applications to adapt to specific situations. Therefore, in neural network applications, memristors require high-precision programmability to guarantee uniform and accurate performance across a large number of memristive networks22-28. This requires many distinguishable conductance levels on each memristive device, not only laboratory-made devices but also devices fabricated in factories. Analog memristors with many conductance states also benefit other applications, such as neural network training, scientific computing and even 'mortal computing'25,29,30. Here we report 2,048 conductance levels achieved with memristors in fully integrated chips with 256 × 256 memristor arrays monolithically integrated on complementary metal-oxide-semiconductor (CMOS) circuits in a commercial foundry. We have identified the underlying physics that previously limited the number of conductance levels that could be achieved in memristors and developed electrical operation protocols to avoid such limitations. These results provide insights into the fundamental understanding of the microscopic picture of memristive switching as well as approaches to enable high-precision memristors for various applications. Fig. 1 HIGH-PRECISION MEMRISTOR FOR NEUROMORPHIC COMPUTING.: a, Proposed scheme of the large-scale application of memristive neural networks for edge computing. Neural network training is performed in the cloud. The obtained weights are downloaded and accurately programmed into a massive number of memristor arrays distributed at the edge, which imposes high-precision requirements on memristive devices. b, An eight-inch wafer with memristors fabricated by a commercial semiconductor manufacturer. c, High-resolution transmission electron microscopy image of the cross-section view of a memristor. Pt and Ta serve as the bottom electrode (BE) and top electrode (TE), respectively. Scale bars, 1 µm and 100 nm (inset). d, Magnification of the memristor material stack. Scale bar, 5 nm. e, As-programmed (blue) and after-denoising (red) currents of a memristor are read by a constant voltage (0.2 V). The denoising process eliminated the large-amplitude RTN observed in the as-programmed state (see Methods). f, Magnification of three nearest-neighbour states after denoising. The current of each state was read by a constant voltage (0.2 V). No large-amplitude RTN was observed, and all of the states can be clearly distinguished. g, An individual memristor on the chip was tuned into 2,048 resistance levels by high-resolution off-chip driving circuitry, and each resistance level was read by a d.c. voltage sweeping from 0 to 0.2 V. The target resistance was set from 50 µS to 4,144 µS with a 2-µS interval between neighbouring levels. All readings at 0.2 V are less than 1 µS from the target conductance. Bottom inset, magnification of the resistance levels. Top inset, experimental results of an entire 256 × 256 array programmed by its 6-bit on-chip circuitry into 64 32 × 32 blocks, and each block is programmed into one of the 64 conductance levels. Each of the 256 × 256 memristors has been previously switched over one million cycles, demonstrating the high endurance and robustness of the devices.

Roadmap on emerging hardware and technology for machine learning.

Recent progress in artificial intelligence is largely attributed to the rapid development of machine learning, especially in the algorithm and neural network models. However, it is the performance of the hardware, in particular the energy efficiency of a computing system that sets the fundamental limit of the capability of machine learning. Data-centric computing requires a revolution in hardware systems, since traditional digital computers based on transistors and the von Neumann architecture were not purposely designed for neuromorphic computing. A hardware platform based on emerging devices and new architecture is the hope for future computing with dramatically improved throughput and energy efficiency. Building such a system, nevertheless, faces a number of challenges, ranging from materials selection, device optimization, circuit fabrication and system integration, to name a few. The aim of this Roadmap is to present a snapshot of emerging hardware technologies that are potentially beneficial for machine learning, providing the Nanotechnology readers with a perspective of challenges and opportunities in this burgeoning field.

Memristive crossbar arrays for brain-inspired computing.

With their working mechanisms based on ion migration, the switching dynamics and electrical behaviour of memristive devices resemble those of synapses and neurons, making these devices promising candidates for brain-inspired computing. Built into large-scale crossbar arrays to form neural networks, they perform efficient in-memory computing with massive parallelism by directly using physical laws. The dynamical interactions between artificial synapses and neurons equip the networks with both supervised and unsupervised learning capabilities. Moreover, their ability to interface with analogue signals from sensors without analogue/digital conversions reduces the processing time and energy overhead. Although numerous simulations have indicated the potential of these networks for brain-inspired computing, experimental implementation of large-scale memristive arrays is still in its infancy. This Review looks at the progress, challenges and possible solutions for efficient brain-inspired computation with memristive implementations, both as accelerators for deep learning and as building blocks for spiking neural networks.

Publisher Correction: Memristive crossbar arrays for brain-inspired computing.

An amendment to this paper has been published and can be accessed via a link at the top of the paper.

Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing.

The accumulation and extrusion of Ca2+ in the pre- and postsynaptic compartments play a critical role in initiating plastic changes in biological synapses. To emulate this fundamental process in electronic devices, we developed diffusive Ag-in-oxide memristors with a temporal response during and after stimulation similar to that of the synaptic Ca2+ dynamics. In situ high-resolution transmission electron microscopy and nanoparticle dynamics simulations both demonstrate that Ag atoms disperse under electrical bias and regroup spontaneously under zero bias because of interfacial energy minimization, closely resembling synaptic influx and extrusion of Ca2+, respectively. The diffusive memristor and its dynamics enable a direct emulation of both short- and long-term plasticity of biological synapses, representing an advance in hardware implementation of neuromorphic functionalities.

Black Phosphorus Mid-Infrared Photodetectors with High Gain.

Recently, black phosphorus (BP) has joined the two-dimensional material family as a promising candidate for photonic applications due to its moderate bandgap, high carrier mobility, and compatibility with a diverse range of substrates. Photodetectors are probably the most explored BP photonic devices, however, their unique potential compared with other layered materials in the mid-infrared wavelength range has not been revealed. Here, we demonstrate BP mid-infrared detectors at 3.39 µm with high internal gain, resulting in an external responsivity of 82 A/W. Noise measurements show that such BP photodetectors are capable of sensing mid-infrared light in the picowatt range. Moreover, the high photoresponse remains effective at kilohertz modulation frequencies, because of the fast carrier dynamics arising from BP's moderate bandgap. The high photoresponse at mid-infrared wavelengths and the large dynamic bandwidth, together with its unique polarization dependent response induced by low crystalline symmetry, can be coalesced to promise photonic applications such as chip-scale mid-infrared sensing and imaging at low light levels.

Synthetic Biological Protein Nanowires with High Conductivity.

Genetic modification to add tryptophan to PilA, the monomer for the electrically conductive pili of Geobacter sulfurreducens, yields conductive protein filaments 2000-fold more conductive than the wild-type pili while cutting the diameter in half to 1.5 nm.

Fabrication of sub-10 nm metal nanowire arrays with sub-1 nm critical dimension control.

Sub-10 nm metal nanowire arrays are important electrodes for building high density emerging 'beyond CMOS' devices. We made Pt nanowire arrays with sub-10 nm feature size using nanoimprint lithography on silicon substrates with 100 nm thick thermal oxide. We further studied the critical dimension (CD) evolution in the fabrication procedure and achieved 0.4 nm CD control, providing a viable solution to the imprint lithography CD challenge as specified by the international technology roadmap for semiconductors. Finally, we fabricated Pt/TiO2/Pt memristor crossbar arrays with the 8 nm electrodes, demonstrating great potential in dimension scaling of this emerging device.

Nanoimprint lithography 20 years on.

To celebrate the 20th anniversary of nanoimprint lithography (NIL) we present a perspective of how the technique and its prospects have evolved over the past two decades. We describe how it overcame certain fabrication challenges at the time it was first reported and look at some of the obstacles that hindered uptake in industry initially, as well as likely sectors for future successful commercial deployment. Developments in the technique since that are making NIL increasingly attractive such as 'moving roll to roll' for higher throughput, are also described.

Black phosphorus radio-frequency transistors.

Few-layer and thin film forms of layered black phosphorus (BP) have recently emerged as a promising material for applications in high performance nanoelectronics and infrared optoelectronics. Layered BP thin films offer a moderate bandgap of around 0.3 eV and high carrier mobility, which lead to transistors with decent on-off ratios and high on-state current densities. Here, we demonstrate the gigahertz frequency operation of BP field-effect transistors for the first time. The BP transistors demonstrated here show respectable current saturation with an on-off ratio that exceeds 2 × 10(3). We achieved a current density in excess of 270 mA/mm and DC transconductance above 180 mS/mm for hole conduction. Using standard high frequency characterization techniques, we measured a short-circuit current-gain cutoff frequency fT of 12 GHz and a maximum oscillation frequency fmax of 20 GHz in 300 nm channel length devices. BP devices may offer advantages over graphene transistors for high frequency electronics in terms of voltage and power gain due to the good current saturation properties arising from their finite bandgap, thus can be considered as a promising candidate for the future high performance thin film electronics technology for operation in the multi-GHz frequency range and beyond.

3D integration of planar crossbar memristive devices with CMOS substrate.

Planar memristive devices with bottom electrodes embedded into the substrates were integrated on top of CMOS substrates using nanoimprint lithography to implement hybrid circuits with a CMOL-like architecture. The planar geometry eliminated the mechanically and electrically weak parts, such as kinks in the top electrodes in a traditional crossbar structure, and allowed the use of thicker and thus less resistive metal wires as the bottom electrodes. Planar memristive devices integrated with CMOS have demonstrated much lower programing voltages and excellent switching uniformity. With the inclusion of the Moiré pattern, the integration process has sub-20 nm alignment accuracy, opening opportunities for 3D hybrid circuits in applications in the next generation of memory and unconventional computing.

Programming memristor arrays with arbitrarily high precision for analog computing.

In-memory computing represents an effective method for modeling complex physical systems that are typically challenging for conventional computing architectures but has been hindered by issues such as reading noise and writing variability that restrict scalability, accuracy, and precision in high-performance computations. We propose and demonstrate a circuit architecture and programming protocol that converts the analog computing result to digital at the last step and enables low-precision analog devices to perform high-precision computing. We use a weighted sum of multiple devices to represent one number, in which subsequently programmed devices are used to compensate for preceding programming errors. With a memristor system-on-chip, we experimentally demonstrate high-precision solutions for multiple scientific computing tasks while maintaining a substantial power efficiency advantage over conventional digital approaches.

Mold cleaning with polydimethylsiloxane for nanoimprint lithography.

We present a simple and effective mold cleaning method for nanoimprint lithography. Polydimethylsiloxane (PDMS) prepolymer is spin-coated onto a contaminated imprint mold, thermally cured in an ambient environment, and then peeled off afterwards. Contaminants of 100 s µm to sub-50 nm sizes are effectively cleaned within one cycle. During the cleaning process, a very thin PDMS film (1-2 nm) is uniformly coated onto the mold surface, serving as a protection and anti-sticking layer.

Diffusive Memristors with Uniform and Tunable Relaxation Time for Spike Generation in Event-Based Pattern Recognition.

A diffusive memristor is a promising building block for brain-inspired computing hardware. However, the randomness in the device relaxation dynamics limits the wide-range adoption of diffusive memristors in large arrays. In this work, the device stack is engineered to achieve a much-improved uniformity in the relaxation time (standard deviation σ reduced from ≈12 to ≈0.32 ms). The memristor is further connected with a resistor or a capacitor and the relaxation time is tuned between 1.13 µs and 1.25 ms, ranging from three orders of magnitude. The hierarchy of time surfaces (HOTS) algorithm, to utilize the tunable and uniform relaxation behavior for spike generation, is implemented. An accuracy of 77.3% is achieved in recognizing moving objects in the neuromorphic MNIST (N-MNIST) dataset. The work paves the way for building emerging neuromorphic computing hardware systems with ultralow power consumption.

Memristive Field-Programmable Analog Arrays for Analog Computing.

The increasing interests in analog computing nowadays call for multipurpose analog computing platforms with reconfigurability. The advancement of analog computing, enabled by novel electronic elements like memristors, has shown its potential to sustain the exponential growth of computing demand in the new era of analog data deluge. Here, a platform of a memristive field-programmable analog array (memFPAA) is experimentally demonstrated with memristive devices serving as a variety of core analog elements and CMOS components as peripheral circuits. The memFPAA is reconfigured to implement a first-order band pass filter, an audio equalizer, and an acoustic mixed frequency classifier, as application examples. The memFPAA, featured with programmable analog memristors, memristive routing networks, and memristive vector-matrix multipliers, opens opportunities for fast prototyping analog designs as well as efficient analog applications in signal processing and neuromorphic computing.

Impact of geometry on the performance of memristive nanodevices.

We examined the influence of memristor geometry on switching endurance by comparing ribbed and planar TiO(2)-based cross-point devices with 50 nm × 50 nm lateral dimensions. We observed that planar devices exhibited a factor of over four improvement in median endurance value over ribbed structures for otherwise identical structures. Our simulations indicated that the corners in the upper wires of the ribbed devices experienced higher current density and more heating during device forming and switching, and hence a shorter life time.

Self-aligned memristor cross-point arrays fabricated with one nanoimprint lithography step.

We demonstrate a technique to fabricate memristor cross-point arrays using a self-aligned, one step nanoimprint lithography process that simultaneously patterns the bottom electrode, switching material film and the top electrode. Since this process does not require overlay alignment, the fabrication complexity is greatly reduced and the throughput is significantly increased. The critical interfaces are exposed to much less contamination and thus under better chemical control. With this technique, we fabricated arrays of TiO(2)-based memristive devices (junction area 100 nm by 100 nm) that did not require electrical forming and were operated with nanoampere currents.

A fully hardware-based memristive multilayer neural network.

Memristive crossbar arrays promise substantial improvements in computing throughput and power efficiency through in-memory analog computing. Previous machine learning demonstrations with memristive arrays, however, relied on software or digital processors to implement some critical functionalities, leading to frequent analog/digital conversions and more complicated hardware that compromises the energy efficiency and computing parallelism. Here, we show that, by implementing the activation function of a neural network in analog hardware, analog signals can be transmitted to the next layer without unnecessary digital conversion, communication, and processing. We have designed and built compact rectified linear units, with which we constructed a two-layer perceptron using memristive crossbar arrays, and demonstrated a recognition accuracy of 93.63% for the Modified National Institute of Standard and Technology (MNIST) handwritten digits dataset. The fully hardware-based neural network reduces both the data shuttling and conversion, capable of delivering much higher computing throughput and power efficiency.